# US 2026/0087584 A1 · Tiled Minimal Latency Content Update

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- Number: US 2026/0087584 A1
- Document ID: US20260087584A1
- Status: Published application
- Kind: A1
- Application number: 19/055,477
- Filed: 2025-02-17
- Published: 2026-03-26
- Earliest claimed: 2024-09-26
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Peter A. Lisherness; Mahesh B. Chappalli; Davoud A. Jamshidi
- Web page: https://patentgrep.com/patent/US20260087584A1

## CPC

- G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

Systems, methods, and devices are provided to reduce latency in displaying image data on an electronic display. This may include instructing image processing circuitry to read a first tile of image data from a first framebuffer, determining whether the first framebuffer or a second framebuffer has a more recent second tile after the first tile and, based on whether the first framebuffer or the second framebuffer has the more recent second tile, instructing the image processing circuitry to read the second tile from the first framebuffer or the second framebuffer that has the more recent second tile.

## Claims

### Claim 1

An article of manufacture comprising tangible, non-transitory, machine-readable media comprising instructions that, when executed by a data processing system, cause the data processing system to carry out operations comprising:
instructing image processing circuitry to read a first tile of image data from a first framebuffer;
determining whether the first framebuffer or a second framebuffer has a more recent second tile after the first tile; and
based on whether the first framebuffer or the second framebuffer has the more recent second tile, instructing the image processing circuitry to read the second tile from the first framebuffer or the second framebuffer that has the more recent second tile.

### Claim 2 (depends on 1)

The article of manufacture of claim 1, wherein determining whether the first framebuffer or the second framebuffer has the more recent second tile comprises receiving an indication identifying the most recent tile from a graphics processing unit (GPU).

### Claim 3 (depends on 1)

The article of manufacture of claim 1, wherein determining whether the first framebuffer or the second framebuffer has the more recent second tile comprises reading a dashboard of tile completion indicating a recency of tiles stored into the first framebuffer and the second framebuffer.

### Claim 4 (depends on 1)

The article of manufacture of claim 1, wherein determining whether the first framebuffer or the second framebuffer has the more recent second tile comprises inspecting contents of the first framebuffer or the second framebuffer to identify whether there is valid data corresponding to the second tile available.

### Claim 5 (depends on 4)

The article of manufacture of claim 4, wherein the operations comprise marking old tiles from whichever of the first framebuffer and the second framebuffer is not presently being written into as invalid and marking new tiles as valid as they are written into whichever of the first framebuffer and the second framebuffer is presently being written into.

### Claim 6 (depends on 4)

The article of manufacture of claim 4, wherein the operations comprise marking new tiles with a timestamp as they are written into whichever of the first framebuffer and the second framebuffer is presently being written into.

### Claim 7 (depends on 4)

The article of manufacture of claim 4, wherein the operations comprise setting a counter based on an arrival of new tiles as they are written into whichever of the first framebuffer and the second framebuffer is presently being written into.

### Claim 8 (depends on 1)

The article of manufacture of claim 1, wherein the second tile is immediately after the first tile in raster order.

### Claim 9 (depends on 1)

The article of manufacture of claim 1, wherein the second tile is part of the same tile row as the first tile.

### Claim 10 (depends on 1)

The article of manufacture of claim 1, wherein the first tile and the second tile comprise compressed image data.

### Claim 11

An electronic device comprising:
a graphics processing unit (GPU) configured to generate tiles of image data;
a plurality of framebuffers configured to store the tiles; and
an electronic display configured to display image data from one or more of the tiles stored in a selected one of the plurality of framebuffers based on which framebuffer of the plurality of framebuffers has a most recent tile.

### Claim 12 (depends on 11)

The electronic device of claim 11, wherein the tiles of image data are compressed when generated.

### Claim 13 (depends on 11)

The electronic device of claim 11, comprising image processing circuitry configured to read the selected one of the plurality of framebuffers.

### Claim 14 (depends on 13)

The electronic device of claim 13, wherein the image processing circuitry is configured to decompress the tiles of image data.

### Claim 15 (depends on 11)

The electronic device of claim 11, comprising a processor configured to run a display controller configured to control which of the plurality of framebuffers supplies the one or more of the tiles for display on the electronic display.

### Claim 16 (depends on 15)

The electronic device of claim 15, wherein the display controller is configured to identify a tile or a row of tiles comprising the most recent tile.

### Claim 17 (depends on 16)

The electronic device of claim 16, wherein the display controller is configured to identify the most recent tile based on the GPU providing an indication to the display controller when new tiles have been written into the plurality of framebuffers.

### Claim 18

A method comprising:
reading a first tile of image data of a first tile row into image processing circuitry for display on an electronic display; and
reading a second tile of the first tile row next to the first tile of image data into the image processing circuitry for display on the electronic display, wherein the first tile and the second tile correspond to different frames but are displayed on the electronic display at the same time.

### Claim 19 (depends on 18)

The method of claim 18, wherein the second tile is read in raster order after the first tile.

### Claim 20

A method comprising:
generating tiles of image data corresponding to image frames in a first order; and
displaying the tiles of image data corresponding to the image frames in a second order, wherein a row of tiles of image data displayed on an electronic display comprises a first tile corresponding to a first frame of the image frames and a second tile corresponding to a second frame of the image frames.

### Claim 21 (depends on 20)

The method of claim 20, wherein the second order is a raster order and the first order is not a raster order.

### Claim 22 (depends on 21)

The method of claim 21, wherein the first order is an arbitrary order.