Methods and apparatus to generate waveforms
AssigneeTexas Instruments Incorporated
InventorsRyan Patrick Savage, Stephen Phillip Savage
Life of this patent
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Abstract
An example system includes an array of elements, each element of which including a controllable element and a data cell; a memory coupled to the array of elements to supply data to the array of elements; reset driver circuitry coupled to the array of elements to supply reset signals to the data cells; and reset controller circuitry coupled to the reset driver circuitry to generate the reset signals instructions including a bi-level reset indicator to control a first reset signal of the reset signals, a multi-level reset indicator to control a second reset signal of the reset signals, and a duration indicator to control timing of the reset signals.
Claims19
A system comprising:
- an array of elements, each element of the array of elements including a controllable element and a data cell;
- a memory coupled to the array of elements and configurable to supply data to the array of elements;
- reset driver circuitry coupled to the array of elements and configurable to supply reset signals to the data cells;
- and
- reset controller circuitry coupled to the reset driver circuitry and configurable to generate the reset signals using a plurality of instructions, the plurality of instructions including:
- a bi-level reset indicator to control a first reset signal of the reset signals;
- a multi-level reset indicator to control a second reset signal of the reset signals;
- and
- a duration indicator to control timing of the reset signals.
A method comprising:
- supplying, by a memory controller, a first instruction of a plurality of instructions to waveform generation circuitry at a first time;
- generating, by the waveform generation circuitry, reset signals based on a bi-level reset indicator and a multi-level reset indicator of the first instruction;
- generating, by the waveform generation circuitry, an increment indicator at a second time in response to a count of a number of clock cycles since the first time reaching a duration indicator of the first instruction;
- supplying, by the memory controller, a second instruction of the plurality of instructions to the waveform generation circuitry at the second time;
- and
- modifying, by the waveform generation circuitry, the reset signals based on the bi-level reset indicator and the multi-level reset indicator of the second instruction.
A non-transitory storage medium storing instructions that, when executed by processing circuitry, are configured to cause waveform generation circuitry to generate a waveform, the instruction comprising a first instruction to generate a reset signal, the first instruction comprising:
- a bi-level reset indicator occupying a first position of the first instruction;
- a multi-level reset indicator occupying a second position of the first instruction;
- a coarse duration indicator occupying a third position of the first instruction;
- and
- a fine duration indicator occupying a fourth position of the first instruction.
Dependencies are inferred from the claim text.