# US 2026/0086059 A1 · Detecting damage to integrated circuits > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2026/0086059 A1 - Document ID: US20260086059A1 - Status: Published application - Kind: A1 - Application number: 18/896,632 - Filed: 2024-09-25 - Published: 2026-03-26 - Earliest claimed: 2024-09-25 - Assignees: Apple Inc. - Applicants: Apple Inc. - Inventors: Dong Zheng - Web page: https://patentgrep.com/patent/US20260086059A1 ## CPC - G01N 27/041: {of a solid body} - G01N 27/045: {Circuits (measuring resistance per se G01R27/00, e.g. G01R27/22)} - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) ## Abstract A device includes an integrated circuit with multiple layers. A sensing trace is disposed on a first layer of the integrated circuit. The sensing trace includes a first node coupled to a ground and a second node coupled to a current source. The device also includes a resistor circuit coupled to the sensing trace. The device further includes a sensing circuit configured to detect damage to one or more layers of the multiple layers based on the sensing trace and the resistor circuit. ## Claims ### Claim 1 An apparatus, comprising: an integrated circuit, the integrated circuit comprising multiple layers, the multiple layers comprising a first layer; a sensing trace disposed on the first layer of the integrated circuit, the sensing trace comprising a first node coupled to a ground and a second node coupled to a current source; a resistor circuit coupled to the sensing trace; and a sensing circuit configured to detect damage to one or more layers of the multiple layers based on the sensing trace and the resistor circuit. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein to detect damage to the one or more layers, the sensing circuit is configured to: determine a resistance of the sensing trace when a current generated by the current source is provided to the sensing trace; determine whether the resistance of the sensing trace is within a threshold of a target resistance; and in response determining that the resistance of the sensing trace is not within the threshold the target resistance, determine that the integrated circuit may be damaged. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the sensing circuit is further configured to: determine an extent of damage to the integrated circuit based on the resistance of the sensing trace. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the sensing circuit is further configured to: determine the target resistance based on a temperature of the integrated circuit. ### Claim 5 (depends on 1) The apparatus of claim 1, further comprising: one or more additional sensing traces disposed on the first layer of the integrated circuit; and one or more additional resistor circuits coupled to the one or more additional sensing traces. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein each of the sensing trace and the one or more additional sensing traces are disposed on different portions of the first layer of the integrated circuit. ### Claim 7 (depends on 5) The apparatus of claim 5, further comprising: one or more additional sensing circuits, each of the one or more additional sensing circuits configured to detect damage to one or more layers of the multiple layers based on a respective sensing trace and a respective resistor circuit. ### Claim 8 (depends on 5) The apparatus of claim 5, wherein the sensing circuit is further configured to detect damage to one or more layers of the multiple layers based on the one or more additional sensing traces and the one or more additional resistor circuits. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein the sensing trace is disposed around a perimeter of the integrated circuit. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the sensing trace is disposed above one or more active devices located in a layer below the first layer. ### Claim 11 A method, comprising: applying a current to a sensing trace disposed on a first layer of an integrated circuit, the sensing trace comprising a first node coupled to a ground and a second node coupled to a current source; determining a resistance of the sensing trace; and determining whether there may be damage to the integrated circuit based on the resistance of the sensing trace and a target resistance. ### Claim 12 (depends on 11) The method of claim 11, wherein determining whether there may be damage to the integrated circuit based on the resistance of the sensing trace and the target resistance comprises: determining whether the resistance of the sensing trace is within a threshold of the target resistance. ### Claim 13 (depends on 12) The method of claim 12, further comprising: determining that there may be damage to the integrated circuit when the resistance of the sensing trace is not within the threshold of the target resistance. ### Claim 14 (depends on 13) The method of claim 13, further comprising: determining an extent of damage to the integrated circuit based on the resistance of the sensing trace. ### Claim 15 A circuit, comprising: a first layer comprising one or more active devices; and a second layer disposed above the first layer, the second layer comprising: a sensing trace comprising a first node coupled to a ground and a second node coupled to a current source; and a resistor circuit coupled to the sensing trace, wherein the sensing trace is coupled to a sensing circuit configured to detect damage to the one or more active devices based on the sensing trace and the resistor circuit. ### Claim 16 (depends on 15) The circuit of claim 15, wherein to detect damage to the one or more active devices, the sensing circuit is configured to: determine a resistance of the sensing trace when a current generated by the current source is provided to the sensing trace; determine whether the resistance of the sensing trace is within a threshold of a target resistance; and in response determining that the resistance of the sensing trace is not within the threshold the target resistance, determine that the one or more active devices may be damaged. ### Claim 17 (depends on 15) The circuit of claim 15, wherein the second layer further comprises: one or more additional sensing traces; and one or more additional resistor circuits coupled to the one or more additional sensing traces. ### Claim 18 (depends on 17) The circuit of claim 17, wherein the one or more additional sensing traces are coupled to one or more additional sensing circuits, and each of the one or more additional sensing circuits configured to detect damage to the one or more active devices based on a respective sensing trace and a respective resistor circuit. ### Claim 19 (depends on 17) The circuit of claim 17, wherein the sensing circuit is further configured to detect damage to the one or more active devices based on the one or more additional sensing traces and the one or more additional resistor circuits. ### Claim 20 (depends on 15) The circuit of claim 15, wherein the sensing trace is disposed around a perimeter of the circuit.