Exception Vector Table Selection Using Processor Operating Mode
AssigneeApple Inc.
InventorsJeff Gonion, Alexander Donald Charles Chadwick, Bernard J. Semeria
Life of this patent
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AssigneeApple Inc.
InventorsJeff Gonion, Alexander Donald Charles Chadwick, Bernard J. Semeria
Estimating the term…
A processor circuit may include a mode transition circuit, an exception management circuit, and a plurality of circuits configured to assert respective exception signals. The mode transition circuit may be configured to select a particular one of a plurality of processor modes, corresponding to a respective set of memory access permissions. The exception management circuit may be configured to receive an indication of an assertion of a particular exception signal by a respective one of the plurality of circuits, and then select a vector table of a plurality of vector tables based on a determined processor mode of the plurality of processor modes. The exception management circuit may also be configured to, based on the particular exception signal, determine a vector address within the selected vector table and, based on the determined vector address, retrieve a particular exception handler address from the selected vector table.
An apparatus, comprising:
A method, comprising:
A non-transitory, computer-readable storage medium storing program instructions that include one or more instances of an instruction that is executable by a processor circuit of a computer system to request an agent transition including a change from a current value of an agent index to a new value, a value of the agent index being indicative of a software agent that is currently executing on the processor circuit, wherein execution of a particular instance of the instruction causes the processor circuit to:
Dependencies are inferred from the claim text.