# US 2026/0076274 A1 · Electronic devices and methods of manufacturing electronic devices

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- Number: US 2026/0076274 A1
- Document ID: US20260076274A1
- Status: Published application
- Kind: A1
- Application number: 19/323,956
- Filed: 2025-09-09
- Published: 2026-03-12
- Earliest claimed: 2024-09-12
- Assignees: Amkor Technology Singapore Holding Pte. Ltd.
- Applicants: Amkor Technology Singapore Holding Pte. Ltd.
- Inventors: Jae Jin Lee; Seul Bee Lee; Hee Yong Park
- Web page: https://patentgrep.com/patent/US20260076274A1

## CPC

- H10W 40/258: {Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence)}
- H10W 40/70: Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
- H10W 70/023: {Connecting or disconnecting interconnections thereto or therefrom, e.g. connecting bond wires or bumps}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 74/014: {using batch processing}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/00: Package configurations
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/66: Conductive materials thereof
- H10W 72/0198: {batch processes}
- H10W 72/072: {of bump connectors}
- H10W 72/07232: {Compression bonding, e.g. thermocompression bonding}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/07254: {changes in dispositions}
- H10W 72/07354: {changes in dispositions}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/247: {Dispositions of multiple bumps}
- H10W 72/265: {Providing thermal transfer, e.g. thermal bumps}
- H10W 72/267: {Multiple bump connectors having different functions}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 74/01: Manufacture or treatment
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/288: {characterised by arrangements for thermal management of the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

In one example, an electronic device includes a first substrate, an electronic component disposed over a side of the first substrate, and a vertical interconnect structure coupled to the side of the first substrate. The vertical interconnect structure comprises a first metallic core structure coupled to the side of the first substrate, a second metallic core structure coupled to the first metallic core structure, and a fusible material coupling the first metallic core structure with the second metallic core structure. The fusible material also couples the first metallic core structure to the first substrate. A second substrate can be disposed over the electronic component and the vertical interconnect structure. The second metallic core structure of the vertical interconnect structure can be coupled to the second substrate by the fusible material. An encapsulant can be disposed over the electronic component. Other examples and related methods are also disclosed herein.

## Claims

### Claim 1

An electronic device, comprising:
a first substrate;
an electronic component disposed over a side of the first substrate;
a vertical interconnect structure coupled to the side of the first substrate, the vertical interconnect structure comprising:
a first metallic core structure coupled to the side of the first substrate;
a second metallic core structure coupled to the first metallic core structure;
a fusible material coupling the first metallic core structure with the second metallic core structure, wherein the fusible material couples the first metallic core structure to the first substrate; and
a second substrate disposed over the electronic component and the vertical interconnect structure, wherein the second metallic core structure of the vertical interconnect structure is coupled to the second substrate by the fusible material; and
an encapsulant disposed over the electronic component, around the first metallic core structure and the second metallic core structure, and between the first substrate and the second substrate.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein the first metallic core structure comprises a first pin.

### Claim 3 (depends on 2)

The electronic device of claim 2, wherein the second metallic core structure comprises a second pin.

### Claim 4 (depends on 2)

The electronic device of claim 2, wherein the second metallic core structure comprises a ball.

### Claim 5 (depends on 1)

The electronic device of claim 1, wherein the first metallic core structure comprises a ball.

### Claim 6 (depends on 1)

The electronic device of claim 1, wherein the first metallic core structure and the second metallic core structure comprise copper.

### Claim 7 (depends on 1)

The electronic device of claim 1, wherein a portion of the fusible material coupling the first metallic core structure with the second metallic core structure is disposed lateral to a sidewall of the electronic component.

### Claim 8 (depends on 7)

The electronic device of claim 7, wherein the encapsulant is coupled to the portion of the fusible material coupling the first metallic core structure with the second metallic core structure.

### Claim 9

An electronic device, comprising:
a first substrate;
an electronic component disposed over the first substrate;
a first interconnect structure coupled to the first substrate lateral to the electronic component;
a second interconnect structure coupled to the first interconnect structure;
a fusible material coupling the first interconnect structure with the second interconnect structure and coupling the first interconnect structure with the first substrate; and
a second substrate disposed over the electronic component and the second interconnect structure, wherein the second interconnect structure is coupled to the second substrate by the fusible material.

### Claim 10 (depends on 9)

The electronic device of claim 9, wherein the first interconnect structure comprises a first metallic core pin.

### Claim 11 (depends on 10)

The electronic device of claim 10, wherein the second interconnect structure comprises a second metallic core pin.

### Claim 12 (depends on 10)

The electronic device of claim 10, wherein the second interconnect structure comprises a metallic core ball.

### Claim 13 (depends on 10)

The electronic device of claim 10, wherein a portion of the fusible material coupling the first interconnect structure with the second interconnect structure is disposed lateral to a sidewall of the electronic component.

### Claim 14 (depends on 9)

The electronic device of claim 9, further comprising an underfill disposed between the electronic component and the first substrate.

### Claim 15 (depends on 9)

The electronic device of claim 9, wherein the electronic component is in electronic communication with the second substrate through the first substrate, the first interconnect structure, and the second interconnect structure.

### Claim 16

A method of manufacturing an electronic device, comprising:
providing a first substrate;
providing an electronic component coupled to the first substrate;
providing a first interconnect structure coupled to the first substrate lateral to the electronic component;
providing a second substrate comprising a second interconnect structure coupled to the second substrate;
aligning the first substrate and second substrate with the first interconnect structure over the second interconnect structure; and
coupling the first interconnect structure with the second interconnect structure using a fusible material.

### Claim 17 (depends on 16)

The method of claim 16, wherein the first interconnect structure comprises a first metallic core pin.

### Claim 18 (depends on 16)

The method of claim 16, wherein the second interconnect structure comprises a second metallic core pin.

### Claim 19 (depends on 16)

The method of claim 16, wherein the second interconnect structure comprises a metallic core ball.

### Claim 20 (depends on 16)

The method of claim 16, further comprising providing an encapsulant around sides of the first interconnect structure and the second interconnect structure, between the first interconnect structure and the electronic component, and between the electronic component and the second substrate.