Improved integrated passive device dies and methods of forming and placement of the same

A chip package structure, comprising:

• an interposer;
• a semiconductor device die electrically connected to the interposer;
• and
• an integrated passive device die electrically connected to the interposer, the integrated passive device die comprising:
• a first substrate;
• and
• a first plurality of integrated passive devices formed in or on the substrate, wherein each of the first plurality of integrated passive devices comprise electrical connections that are formed as a plurality of micro-bumps, and
• wherein the integrated passive device die is generated by dicing a second substrate having a second plurality of integrated passive devices such that the first substrate is a portion of the second substrate and the first plurality of integrated passive devices is a subset of the second plurality of integrated passive devices.

A chip package structure, comprising:

• an interposer including a plurality of bonding pads or micro-bumps;
• a semiconductor device die electrically connected to the interposer;
• and
• an integrated passive device die including a plurality of micro-bumps such that at least some of the plurality of micro-bumps are electrically connected to respective bonding pads or micro-bumps of the interposer.