# US 2026/0076232 A1 · Semiconductor structure > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2026/0076232 A1 - Document ID: US20260076232A1 - Status: Published application - Kind: A1 - Application number: 19/304,929 - Filed: 2025-08-20 - Published: 2026-03-12 - Earliest claimed: 2024-09-06 - Assignees: Mediatek Inc. - Applicants: Mediatek Inc. - Inventors: Sang-Mao CHIU; Chi-Yuan CHEN; Shih-Chin LIN; Yi-Ting KUO - Web page: https://patentgrep.com/patent/US20260076232A1 ## CPC - H10W 70/65: Shapes or dispositions of interconnections - H10W 70/685: comprising multiple insulating layers - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor structure is provided. The semiconductor structure includes a substrate. The substrate includes a first core having a first top surface and a first bottom surface. First dielectric layers are disposed on the first top surface and the first bottom surface of the first core. The substrate has a first hole passing through the first core. In addition, the substrate has a second hole passing through the first core and the first dielectric layers. ## Claims ### Claim 1 A semiconductor structure, comprising: a substrate, wherein the substrate comprises: a first core having a first top surface and a first bottom surface; first dielectric layers disposed on the first top surface and the first bottom surface of the first core, wherein the substrate has a first hole passing through the first core and a second hole passing through the first core and the first dielectric layers. ### Claim 2 (depends on 1) The semiconductor structure as claimed in claim 1, wherein the substrate further comprises: a first conductive material disposed in the first hole; and a second conductive material disposed in the second hole, wherein in a first direction, a first dimension of the first conductive material is smaller than a second dimension of the second conductive material. ### Claim 3 (depends on 2) The semiconductor structure as claimed in claim 2, wherein a first terminal of the first conductive material and a second terminal of the second conductive material corresponding to the first terminal are close to opposite surfaces of one of the first dielectric layers. ### Claim 4 (depends on 1) The semiconductor structure as claimed in claim 1, wherein the substrate further comprises: second dielectric layers disposed on the first dielectric layers and opposite to the first core, wherein the first dielectric layers and the second dielectric layers are made of different materials. ### Claim 5 (depends on 4) The semiconductor structure as claimed in claim 4, wherein the substrate further comprises: a first via disposed in the first dielectric layer and coupled to the first conductive material by a first conductive layer covered by the first dielectric layer; and a second via disposed in the second dielectric layer and coupled to the second conductive material by a second conductive layer covered by the second dielectric layer. ### Claim 6 (depends on 5) The semiconductor structure as claimed in claim 5, wherein the first via has a first diameter, and the second via has a second diameter, which is smaller than the first diameter. ### Claim 7 (depends on 5) The semiconductor structure as claimed in claim 5, wherein the first via and the first conductive layer are used for power transmission. ### Claim 8 (depends on 5) The semiconductor structure as claimed in claim 5, wherein the second via and the second conductive layer are used for signal transmission. ### Claim 9 (depends on 5) The semiconductor structure as claimed in claim 5, wherein the first conductive layer has a first line width, and the second conductive layer has a second line width, which is smaller than the first line width. ### Claim 10 (depends on 1) The semiconductor structure as claimed in claim 1, wherein the substrate further comprises: a first integrated passive device embedded in the first core, wherein the first integrated passive device is coupled to a third via and a third conductive layer disposed in the first dielectric layers on the top surface of the first core. ### Claim 11 (depends on 1) The semiconductor structure as claimed in claim 1, wherein the substrate further comprises: a second core disposed on the first core, wherein one of the first dielectric layers is disposed between the first core and the second core. ### Claim 12 (depends on 11) The semiconductor structure as claimed in claim 11, wherein another one of the first dielectric layers is disposed on the second core and opposite to the one of the first dielectric layers. ### Claim 13 (depends on 12) The semiconductor structure as claimed in claim 12, wherein the first hole further passes through the second core and the one of the first dielectric layers, and the second hole further passes through the second core and all of the first dielectric layers. ### Claim 14 (depends on 13) The semiconductor structure as claimed in claim 13, wherein the first hole further passes through the other one of the first dielectric layers. ### Claim 15 (depends on 11) The semiconductor structure as claimed in claim 11, wherein the substrate further comprises: a first integrated passive device embedded in the first core; a second integrated passive device embedded in the second core, wherein the first integrated passive device is separated from the second integrated passive device. ### Claim 16 (depends on 15) The semiconductor structure as claimed in claim 15, wherein the first integrated passive device and the second integrated passive device are coupled to vias and conductive traces disposed in the first dielectric layers on the top and bottom surfaces of the first dielectric layers, except for the one of the first dielectric layers. ### Claim 17 A semiconductor structure, comprising: a substrate, wherein the substrate comprises: a core structure, wherein the core structure comprises: at least two cores and at least three first dielectric layers stacked on each other, wherein the at least two cores are arranged in such a way that they alternate with the at least three first dielectric layers, wherein the core structure has a first conductive material passing through the at least two cores and one of the at least three first dielectric layers, and a second conductive material passing through the at least two cores and the at least three first dielectric layers. ### Claim 18 (depends on 17) The semiconductor structure as claimed in claim 17, wherein the first conductive material is used for signal transmission, and the second conductive material is used for power transmission. ### Claim 19 (depends on 17) The semiconductor structure as claimed in claim 17, wherein the substrate further comprises: an integrated passive device embedded in one of the at least two cores, wherein the integrated passive device is coupled to conductive traces disposed in one of the at least three first dielectric layers close to a top surface or a bottom surface of the core structure. ### Claim 20 (depends on 17) The semiconductor structure as claimed in claim 17, wherein the substrate further comprises: at least two second dielectric layers disposed on a top surface and a bottom surface of the core structure and connected to a top one and a bottom one of the at least three first dielectric layers, wherein the at least three first dielectric layers and the at least two second dielectric layers are made of different materials.