# US 2026/0075902 A1 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2026/0075902 A1 - Document ID: US20260075902A1 - Status: Published application - Kind: A1 - Application number: 19/308,273 - Filed: 2025-08-24 - Published: 2026-03-12 - Earliest claimed: 2024-09-11 - Assignees: Fuji Electric Co., Ltd. - Applicants: Fuji Electric Co., Ltd. - Inventors: Misaki UCHIDA; Takashi YOSHIMURA; Shuntaro YAGUCHI - Web page: https://patentgrep.com/patent/US20260075902A1 ## CPC - H10D 62/60: Impurity distributions or concentrations - H10D 8/422: {PN diodes having the PN junctions in mesas} - H10D 12/038: {having a recessed gate, e.g. trench-gate IGBTs} - H10D 12/417: {having a drift region having a doping concentration that is higher at the collector side relative to other parts of the drift region} - H10D 12/418: {having a drift region having a doping concentration that is higher at the emitter side relative to other parts of the drift region} - H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs} - H10D 62/105: {by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] (IGFETs having LDD or drain extension regions H10D30/601)} - H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs} - H10D 62/53: the imperfections being within the semiconductor body - H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates} - H10D 84/161: {IGBT having built-in components} - H10D 12/415: {having edge termination structures} - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D 62/128: {Anode regions of diodes} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Provided is a semiconductor device which is provided in a semiconductor substrate having a first principal surface and a second principal surface and containing a bulk dopant, the semiconductor device including: in the semiconductor substrate, a first low concentration region of a first conductivity type which has a carrier concentration lower than a bulk concentration that is a concentration of the bulk dopant; and a first high concentration region of the first conductivity type which has a first carrier concentration peak at a position in contact with the first low concentration region on a side of the first principal surface and has a carrier concentration higher than the bulk concentration, in which a hydrogen concentration peak is not provided at a position overlapping with the first carrier concentration peak. ## Claims ### Claim 1 A semiconductor device which is provided in a semiconductor substrate having a first principal surface and a second principal surface and containing a bulk dopant, the semiconductor device comprising: in the semiconductor substrate, a first low concentration region of a first conductivity type which has a carrier concentration lower than a bulk concentration that is a concentration of the bulk dopant; and a first high concentration region of the first conductivity type which has a first carrier concentration peak at a position in contact with the first low concentration region on a side of the first principal surface and has a carrier concentration higher than the bulk concentration, wherein a hydrogen concentration peak is not provided at a position overlapping with the first carrier concentration peak. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first high concentration region includes a hydrogen-related donor. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, wherein the first carrier concentration peak is a concentration peak of a hydrogen-related donor. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the first low concentration region has a helium concentration peak in a depth direction of the semiconductor substrate. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein a width of the helium concentration peak in the depth direction is smaller than a width of the first low concentration region in the depth direction. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, further comprising a second high concentration region of the first conductivity type which has a second carrier concentration peak at a position in contact with the first low concentration region on a side of the second principal surface and has a carrier concentration higher than the bulk concentration. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the hydrogen concentration peak is not provided at a position overlapping with the second carrier concentration peak. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein the second carrier concentration peak is a concentration peak of a hydrogen-related donor. ### Claim 9 (depends on 6) The semiconductor device according to claim 6, wherein between the first carrier concentration peak and the second carrier concentration peak, one closer to the hydrogen concentration peak has a concentration higher than that of another. ### Claim 10 (depends on 6) The semiconductor device according to claim 6, wherein between the first carrier concentration peak and the second carrier concentration peak, one closer to any one of the first principal surface or the second principal surface has a concentration higher than that of another. ### Claim 11 (depends on 6) The semiconductor device according to claim 6, wherein a value obtained by dividing a higher concentration of a concentration of the first carrier concentration peak and a concentration of the second carrier concentration peak by a lower concentration thereof is 1.1 or less. ### Claim 12 (depends on 1) The semiconductor device according to claim 1, further comprising a second high concentration region of the first conductivity type which has a second carrier concentration peak at a position in contact with the first low concentration region on a side of the second principal surface and has a carrier concentration higher than the bulk concentration, wherein the first low concentration region has a helium concentration peak in a depth direction of the semiconductor substrate, and between a concentration of the first carrier concentration peak and a concentration of the second carrier concentration peak, one closer to the helium concentration peak is lower than another. ### Claim 13 (depends on 1) The semiconductor device according to claim 1, further comprising a second high concentration region of the first conductivity type which has a second carrier concentration peak at a position in contact with the first low concentration region on a side of the second principal surface and has a carrier concentration higher than the bulk concentration, wherein the first low concentration region has a helium concentration peak in a depth direction of the semiconductor substrate, the first carrier concentration peak and the second carrier concentration peak each have an outer skirt portion on an opposite side to the helium concentration peak, and between the first carrier concentration peak and the second carrier concentration peak, the outer skirt portion of one closer to the helium concentration peak is steeper than the outer skirt portion of another. ### Claim 14 (depends on 6) The semiconductor device according to claim 6, further comprising a second low concentration region which has a valley portion of a carrier concentration at a position in contact with the second high concentration region on the side of the second principal surface. ### Claim 15 (depends on 6) The semiconductor device according to claim 6, wherein the hydrogen concentration peak is provided on the side of the second principal surface with respect to the second carrier concentration peak. ### Claim 16 (depends on 15) The semiconductor device according to claim 15, wherein a distance in a depth direction of the semiconductor substrate between the hydrogen concentration peak and the second carrier concentration peak is equal to or more than ¼ of a thickness in the depth direction of the semiconductor substrate. ### Claim 17 (depends on 6) The semiconductor device according to claim 6, wherein a constant lifetime portion in which carrier lifetime is constant in a depth direction of the semiconductor substrate is provided between the second carrier concentration peak and the hydrogen concentration peak, and a flat hydrogen concentration portion in which a hydrogen concentration is flat in the depth direction of the semiconductor substrate is provided between the first carrier concentration peak and the hydrogen concentration peak. ### Claim 18 (depends on 1) The semiconductor device according to claim 1, comprising: a drift region of the first conductivity type which is provided in the semiconductor substrate; a base region of a second conductivity type which is provided between the drift region and the first principal surface; a trench portion which is provided from the first principal surface to a position below the base region; an accumulation region which is provided between the drift region and the base region and has a carrier concentration higher than that of the drift region; and a lifetime adjustment region which is provided below the trench portion and has a carrier lifetime showing a local minimum value in a depth direction of the semiconductor substrate, wherein the first high concentration region and the accumulation region overlap with each other, and the first low concentration region and the lifetime adjustment region overlap with each other. ### Claim 19 (depends on 18) The semiconductor device according to claim 18, further comprising a buffer region of the first conductivity type which is provided between the drift region and the second principal surface and has a carrier concentration higher than that of the drift region, wherein the hydrogen concentration peak is provided in the buffer region. ### Claim 20 (depends on 6) The semiconductor device according to claim 6, comprising: a drift region of the first conductivity type which is provided in the semiconductor substrate; a base region of a second conductivity type which is provided between the drift region and the first principal surface; a trench portion which is provided from the first principal surface to a position below the base region; and a lifetime adjustment region which is provided below the trench portion and has a carrier lifetime showing a local minimum value in a depth direction of the semiconductor substrate, wherein the first low concentration region and the lifetime adjustment region overlap with each other, and the second high concentration region and the drift region overlap with each other.