Fifo data buffer with multi-load

A method enacted on a device comprising a first in first out (FIFO) data buffer, the FIFO data buffer comprising a load shift register, a request line encoder, and a state machine, the method comprising:

• receiving a plurality of requests in a first cycle of a clock signal;
• determining, via the request line encoder, a request number value based at least in part on the plurality of requests and one or more requests loaded in the load shift register, the request number value representing a number of requests of the plurality of requests to load into the load shift register;
• loading the plurality of requests into the load shift register in a second cycle of the clock signal;
• and
• outputting one request of the one or more requests loaded in the load shift register in the second cycle of the clock signal.

A method enacted on a device comprising a first in first out (FIFO) data queue, the FIFO data queue comprising a load shift register, a request line encoder, and a state machine, the method comprising:

• receiving a plurality of requests in a first cycle of a clock signal;
• determining, via the request line encoder, a request number value based at least in part on the plurality of requests and one or more requests loaded in the load shift register, the request number value representing a number of requests of the plurality of requests to load into the load shift register;
• for each request of the plurality of requests,
• determining, via the request line encoder, that the request is an active request when the request is not a request of the one or more requests loaded in the load shift register;
• loading, in a second cycle of the clock signal, the request into the load shift register when the request is the active request;
• and
• outputting one request of the one or more requests loaded in the load shift register.