Back to results
US 2026/0068765 A1Published application
Techniques for processing devices
AssigneeAdeia Semiconductor Bonding Technologies Inc.
InventorsCyprian Emeka Uzoh, Laura Wills Mirkarimi, Guilian Gao, Gaius Gillman Fountain, JR.
Life of this patent
Estimating the term…
Abstract
Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.
Claims1
A method of forming a microelectronic assembly, comprising:
- preparing a bonding surface of a first substrate, including:
- planarizing the bonding surface of the first substrate to have a first predetermined minimal surface variance;
- and
- plasma activating the bonding surface of the first substrate;
- preparing a bonding surface of a second substrate, including planarizing the bonding surface of the second substrate to have a second predetermined minimal surface variance;
- mounting the second substrate to a dicing sheet or dicing tape held by a dicing frame;
- singulating the second substrate into a plurality of dies while the second substrate is mounted to the dicing sheet or dicing tape, each die of the plurality of dies having a bonding surface comprising a portion of the bonding surface of the second substrate;
- processing the plurality of dies while the plurality of dies is mounted to the dicing sheet or dicing tape;
- selecting a die of the plurality of dies using a pick and place tool;
- and
- directly bonding the bonding surface of the die to the bonding surface of the first substrate without adhesive, and without activating the bonding surface of the die.
8 more elements
Dependencies are inferred from the claim text.