Semiconductor device and methods of formation

A transistor structure, comprising:

• a first source/drain region in a substrate of a semiconductor device;
• a second source/drain region in the substrate;
• a gate structure above the substrate,
• wherein the gate structure is laterally between the first source/drain region and the second source/drain region;
• and
• a gate dielectric layer between the gate structure and the substrate,
• wherein the gate structure comprises a plurality of laterally-arranged doped regions, each having a different work function value.

A method, comprising:

• forming one or more first portions of a gate dielectric layer of a transistor structure,
• wherein the one or more first portions are composed of a first material having a first dielectric constant (k-value);
• forming one or more second portions of the gate dielectric layer,
• wherein the one or more second portions are composed of a second material having a second k-value that is different than the first k-value;
• forming one or more third portions of the gate dielectric layer,
• wherein the one or more third portions are composed of a third material having a third k-value that is different than the first and second k-values;
• forming a gate structure of the transistor structure over the gate dielectric layer;
• and
• forming a first source/drain region and a second source/drain region such that the first source/drain region and the second source/drain region are laterally adjacent to opposing sides of the gate structure.