Event signals
OwnerIain Robertsoninventor
Life of this patent
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Abstract
A method for an integrated circuit including a plurality of interconnected sub-blocks in a System-on-Chip (SoC) arrangement is provided. The method includes transmitting a message from a first sub-block to at least one sub-block of the plurality of interconnected sub-blocks, in response to an event on the integrated circuit. The method further includes transmitting a signal from the first sub-block to the at least one sub-block of the plurality of interconnected sub-blocks. The signal includes information identifying a class of the event based on a classification of events associated to the integrated circuit into one or more classes.
Claims15
A method for an integrated circuit comprising a plurality of interconnected sub-blocks in a System-on-Chip (SoC) arrangement, the method comprising:
- transmitting a message from a first sub-block to at least one sub-block of the plurality of interconnected sub-blocks, in response to an event on the integrated circuit;
- and
- transmitting a signal from the first sub-block to the at least one sub-block of the plurality of interconnected sub-blocks,
- wherein the signal comprises information identifying a class of the event based on a classification of events associated to the integrated circuit into one or more classes.
A method for an integrated circuit comprising at least two interconnected sub-blocks in a System-on-Chip (SoC) arrangement, the method comprising:
- transmitting, from a first sub-block to a second sub-block of the at least two interconnected sub-blocks, a first signal asserting that the first sub-block is ready to transmit data to the second sub-block;
- receiving, at the first sub-block from the second sub-block, a second signal, the second signal asserting that the second sub-block is ready to receive data from the first sub-block;
- and
- transmitting data via a third signal from the first sub-block to the second sub-block,
- wherein, in response to an event on the integrated circuit, the first sub-block is configured to transmit a message to the second sub-block, and
- wherein the first signal comprises information identifying a class of the event based on a classification of events associated to the integrated circuit into one or more classes.
An integrated circuit comprising a plurality of interconnected sub-blocks in a System-on-Chip (SoC) arrangement, wherein at least a first sub-block of the plurality of interconnected sub-blocks is configured to:
- transmit a message to at least one sub-block of the plurality of interconnected sub-blocks, in response to an event on the integrated circuit;
- and
- transmit a signal to the at least one sub-block of the plurality of interconnected sub-blocks,
- wherein the signal comprises information identifying a class of the event based on a classification of events associated to the integrated circuit into one or more classes.
An integrated circuit comprising at least two interconnected sub-blocks in a System-on-Chip (SoC) arrangement, wherein a first sub-block of the integrated circuit is configured to:
- transmit a first signal asserting that the first sub-block is ready to transmit data to a second sub-block of the at least two interconnected sub-blocks;
- receive, from the second sub-block, a second signal, the second signal asserting that the second sub-block is ready to receive data from the first sub-block;
- and
- transmit data via a third signal to the second sub-block,
- wherein, in response to an event on the integrated circuit, the first sub-block is configured to transmit a message to the second sub-block;
- and
- wherein the first signal comprises information identifying a class of the event based on a classification of events associated to the integrated circuit into one or more classes.
Dependencies are inferred from the claim text.