Built-in self-test (bist) circuit, integrated circuit device and method
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Tsmc China Company Limited
InventorsHuan-Neng CHEN, Shao-Yu LI, CunCun CHEN
Life of this patent
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Abstract
A built-in self-test (BIST) circuit includes a first switch, a first resistor, at least one first transistor, and a control circuit. The first switch, the first resistor and the at least one first transistor are coupled in series between a first power supply terminal of a first power supply voltage and an input/output (I/O) terminal of an I/O circuit. The control circuit is configured to, in a first BIST operation, close the first switch and, while the first switch is being closed, detect a first leakage current between the I/O terminal and a second power supply terminal of a second power supply voltage different from the first power supply voltage.
Claims20
A built-in self-test (BIST) circuit, comprising:
- a first switch;
- a first resistor;
- at least one first transistor;
- and
- a control circuit,
- wherein
- the first switch, the first resistor and the at least one first transistor are coupled in series between a first power supply terminal of a first power supply voltage and an input/output (I/O) terminal of an I/O circuit, and
- the control circuit is configured to, in a first BIST operation,
- close the first switch, and
- while the first switch is being closed, detect a first leakage current between the I/O terminal and a second power supply terminal of a second power supply voltage different from the first power supply voltage.
An integrated circuit (IC) device, comprising:
- an input/output (I/O) circuit having an I/O terminal;
- and
- a built-in self-test (BIST) circuit comprising a first circuit and a first detection assist circuit,
- wherein
- the first circuit is coupled between the I/O terminal and a first power supply terminal, the first circuit configured to, in a first BIST operation, pull a voltage on the I/O terminal toward a first power supply voltage on the first power supply terminal, and
- the first detection assist circuit is coupled to the I/O terminal and a second power supply terminal of a second power supply voltage different from the first power supply voltage, the first detection assist circuit configured to, in the first BIST operation,
- in response to a first leakage current flowing between the I/O terminal and the second power supply terminal, form a first current path through the first detection assist circuit to couple the I/O terminal to the second power supply terminal.
A method, comprising:
- during a first stage of a built-in self-test (BIST) operation of a first integrated circuit (IC) device,
- enabling an output buffer and an input buffer of an input/output (I/O) circuit of the first IC device, an output of the output buffer being coupled at an I/O terminal to an input of the input buffer,
- setting an input of the output buffer to a predetermined logic state, and
- coupling the I/O terminal to a first power supply terminal through a plurality of transistors coupled in series with each other and with a resistor;
- and
- during a second stage of the BIST operation, the second stage subsequent to the first stage,
- disabling the output buffer, and
- based on a logic state of an output of the input buffer, detecting damage in at least one of the first IC device or a die-to-die (D2D) interface structure coupled to the I/O terminal.
Dependencies are inferred from the claim text.