Memory device

A memory device comprising:

• a memory cell including a magnetoresistance effect element and a switching element coupled to the magnetoresistance effect element;
• a first interconnect coupled to a first end of the memory cell;
• and
• a second interconnect coupled to a second end of the memory cell,
• wherein:
• an operation of bringing the magnetoresistance effect element into a first resistance state includes a first period, a second period after the first period, a third period after the second period, a fourth period after the third period, and a fifth period after the fourth period;
• in the first period, a first operation is performed to bring the magnetoresistance effect element into a second resistance state exhibiting a resistance that is lower than a resistance of the first resistance state;
• in the second period, first data is acquired based on a resistance state of the magnetoresistance effect element;
• in the third period, a second operation is performed to bring the magnetoresistance effect element into the first resistance state;
• in the fourth period, second data is acquired based on the resistance state of the magnetoresistance effect element;
• and
• in the fifth period, a third operation is performed to bring the magnetoresistance effect element into the first resistance state.