Decoders, decoding methods, memory systems, and memory controllers

A decoding method, comprising:

• performing a current check calculation using a current column of a check matrix and a current sub-matrix of a current flag matrix;
• wherein the check matrix includes n columns, and n is an integer greater than 1;
• the current flag matrix includes n sub-matrices, and the current sub-matrix is related to a current data block of a flipped codeword;
• the codeword includes n data blocks, each of the data blocks includes k symbols, and k is a positive integer;
• the current sub-matrix includes k current flag bits, and each of the current flag bits is configured to indicate whether a corresponding symbol in a current data block of the codeword is flipped;
• performing a current incremental check calculation on a result of the current check calculation and a previous syndrome to generate a current syndrome;
• and
• determining an error symbol in a next data block of the codeword, using one of the current syndrome or a previous syndrome and a next column of the check matrix, based on the current syndrome not satisfying a check condition;
• wherein the previous syndrome is generated prior to the current syndrome.

A memory controller, comprising:

• a memory interface configured to receive read data;
• and
• a decoder including:
• a first data processing circuit;
• and
• a second data processing circuit coupled to the first data processing circuit;
• the first data processing circuit is configured to:
• perform a current check calculation using a current column of a check matrix and a current sub-matrix of a current flag matrix, and perform a current incremental check calculation on a result of the current check calculation and a previous syndrome to generate a current syndrome;
• wherein the check matrix includes n columns, and n is an integer greater than 1;
• the current flag matrix includes n sub-matrices, and the current sub-matrix is related to a current data block of a flipped codeword;
• the codeword includes n data blocks, each of the data blocks includes k symbols, and k is a positive integer;
• the current sub-matrix includes k current flag bits, and each of the current flag bits is configured to indicate whether a corresponding symbol in a current data block of the codeword is flipped;
• and
• the second data processing circuit is configured to:
• determine an error symbol in a next data block of the codeword, using one of the current syndrome or a previous syndrome and a next column of the check matrix, based on the current syndrome not satisfying a check condition;
• wherein the previous syndrome is generated prior to the current syndrome,
• wherein the decoder is coupled to the memory interface;
• and the decoder is configured to:
• perform a decoding operation on a codeword obtained by converting the read data.