Method of forming multi-gate transistors and resulting structures

A method of forming a device, the method comprising:

• forming a stack of alternating layers of first semiconductor material and second semiconductor material extending from a semiconductor fin, the stack having a first width in a first direction;
• removing layers of second semiconductor material from the stack to form a stack of layers of first semiconductor material, respective layers of first semiconductor material separated by respective first gaps, and a lowest layer of first semiconductor material separated from the semiconductor fin by a second gap;
• applying a surface treatment to sidewalls of the layers of first semiconductor material and to sidewalls of the semiconductor fin to change a property of the sidewalls of the layers of first semiconductor material and at least a top surface of the semiconductor fin;
• depositing a sacrificial material layer on the layers of first semiconductor material and on the semiconductor fin to fill the first gaps and the second gap, wherein the sacrificial material layer is deposited within the first gaps and within the second gap to a second width, greater than the first width in the first direction, and to a first thickness, and further wherein the sacrificial material layer is deposited to a second thickness on the sidewalls of the layers of first semiconductor material and the semiconductor fin, the second thickness being less than the first thickness;
• etching back the sacrificial material layer to decrease the second thickness of the sacrificial material layer on the sidewalls of the layers of first semiconductor material and the semiconductor fin to a third thickness less than the second thickness and to recess the sacrificial material within the first gaps and the second gap to a third width, less than the first width in the first direction, thereby forming recesses in the sacrificial material layer in the first gaps and the second gap;
• and
• filling the recesses in the first gaps and the second gap with a spacer.

A device comprising:

• a semiconductor fin protruding from a substrate;
• a first stack of channel regions extending from the semiconductor fin and a second stack of channel regions extending from the semiconductor fin and laterally displaced from the first stack of channel regions;
• a first gate structure being interposed between respective channel regions of the first stack of channel regions, and a second gate structure being interposed between respective channel regions of the second stack of channel regions;
• a source/drain region on the semiconductor fin and interposed between the first stack of channel regions and the second stack of channel regions, the source/drain region being in contact with the respective channel regions of the first stack of channel regions and with the respective channel regions of the second stack of channel regions;
• and
• an interface between the source/drain region and the semiconductor fin, wherein the semiconductor fin comprises a silicon-containing material, and further wherein a portion of the semiconductor fin adjacent the interface contains nitrogen at a mole percentage nitrogen/silicon ration of up to 0.1.