Method and machine for examining wafers
AssigneeASML Netherlands B.V.
InventorsChien-Hung CHOU, Wen-Tin TAI
Life of this patent
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Abstract
Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.
Claims10
A method for performing weak point inspection of a wafer, comprising:
- receiving a lot including said wafer;
- constructing a recipe according to at least a defect wafer map of at least a previous wafer of said lot or a previous lot loaded from a database to define at least an inspection area on said wafer;
- examining said wafer with a high resolution imaging tool;
- identifying defects in said inspection area according to at least an image took by said high resolution imaging tool;
- and
- recording and updating said database and said defect wafer map.
The method as claimed in claim I, wherein said defect wafer map comprises at least one of the following:
- a possible defect location, within a die or a device provided by a prediction of a numerical simulation;
- a verified result of a previous inspection output of other defect scanning tool;
- and
- a historical wafer map result collected from said previous wafer which experienced all fabrication processes.
A machine for performing weak point inspection of a wafer;
- comprising;
- a load/unload assembly capable of receiving a lot including said wafer;
- a recipe assembly capable of constructing a recipe according to at least a defect:
- wafer map of at least a previous wafer of said lot or a previous lot loaded from a database to define at least an inspection area;
- an examining assembly capable of imaging said wafer with a high resolution imaging tool;
- a defect finding algorism capable of identifying defects in said inspection area according to at least an image took by said high resolution imaging tool;
- and
- a data management algorism capable of classifying said defects and recording and updating said database and said defect wafer map.
Dependencies are inferred from the claim text.