Harmonic Conversion Gain Reduction for Mixer Circuitry

Abstract

Mixer circuitry can include a first mixer transistor configured to receive a first oscillating signal, a second mixer transistor configured to receive a second oscillating signal, and a harmonic conversion gain rejection filter coupled between a source terminal of the first mixer transistor and a source terminal of the second mixer transistor. The harmonic conversion gain rejection filter can be configured to reject a harmonic conversion gain of the mixer circuitry. The mixer circuitry can further include a third mixer transistor configured to receive the first oscillating signal, a fourth mixer transistor configured to receive the second oscillating signal, and another harmonic conversion gain rejection filter coupled between a source terminal of the third mixer transistor and a source terminal of the fourth mixer transistor. The mixer circuitry can further include an output transformer and a notch filter interposed between coils of the output transformer.

Dependencies are inferred from the claim text.