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US 2026/0045409 A1Published application
Electronic device
AssigneeSTMicroelectronics (Crolles 2) SAS
InventorsMarios BARLAS, Yannick LE FRIEC, Xavier FEDERSPIEL
Life of this patent
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Abstract
A device includes a first layer, having a copper track located therein. The first layer is covered with a second layer including a cavity. The cavity exposes at least a portion of the track. The portion is covered with a third layer of titanium nitride doped with silicon.
Claims20
A method of manufacturing a device, comprising:
- forming a first layer having a copper track located therein;
- forming a second layer covering the first layer and including a cavity exposing at least a portion of the track;
- and
- forming, with an atomic layer deposition process, a third layer of titanium nitride doped with silicon covering the portion.
1 more element
A method, comprising:
- forming a plurality of conductive tracks in a first dielectric layer;
- forming a second dielectric layer on the first dielectric layer and on the plurality of conductive tracks;
- forming a plurality of cavities in the second dielectric layer each exposing a respective conductive track;
- forming a first electrode of a capacitor by conformally forming a layer of silicon-doped titanium nitride in each of the cavities in contact with each of the conductive tracks and on a top surface of the second dielectric layer between the cavities;
- forming an insulator of the capacitor by conformally forming a third dielectric layer on the layer of silicon-doped titanium nitride in the cavities and over the top surface of the second dielectric layer between the cavities;
- and
- forming a second electrode of the capacitor by conformally forming a conductive layer on the third dielectric layer in the cavities and over the top surface of the second dielectric layer between the cavities.
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A method, comprising:
- forming a plurality of conductive tracks in a first stack of insulating layers;
- forming a second stack of insulating layers on the first stack of insulating layer and on the plurality of conductive tracks;
- forming a plurality of openings in the second stack of insulating layers, the plurality of conductive tracks being exposed by the plurality of openings;
- forming a plurality of first conductive layers on the plurality of conductive tracks and in the plurality of openings;
- forming a first insulating layer on the plurality of first conductive layers, in the plurality of openings, and on the second stack of insulating layers;
- and
- forming a second conductive layer on the first insulating layer, in the plurality of openings, and on the second stack of insulating layers, the second conductive layer spaced from the second stack of insulating layers by the first insulating layer.
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Dependencies are inferred from the claim text.