Failsafe circuit, device, and method

An integrated circuit (IC) device comprising:

• an input pad configured to receive an input signal;
• a power supply conductor configured to carry a power supply voltage;
• a reference voltage conductor;
• a pull-down transistor coupled to the reference voltage conductor;
• a voltage regulator coupled to the input pad and configured to:
• generate a divided input signal from the input signal;
• and
• output a gate signal based on the divided input signal;
• a gate control circuit coupled to the power supply conductor and the input pad and configured to:
• output a first signal having a greater voltage level of the power supply voltage or the gate signal, and
• output a second signal having a greater voltage level of the input signal or the first signal;
• and
• first and second transistors coupled in series between the input pad and the pull-down driver and configured to receive the first and second signals.

A method of operating a circuit, the method comprising:

• receiving a reference voltage level at a reference node;
• receiving, at a first node, an input signal having a first voltage level or the reference voltage level;
• receiving a power supply voltage at a second node;
• outputting, from a voltage regulator, a gate signal having a divided value of the input signal;
• outputting, from a gate control circuit:
• a first voltage level being a greater voltage level of the power supply voltage or the gate signal, and
• a second voltage level being a greater voltage level of the input signal or the first voltage level;
• and
• using a series of a first transistor and a second transistor to couple the first node to a pull-down driver in response to the first and second voltage levels, wherein the pull-down driver is coupled to the reference node.