Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsManho LEE, Keung Beum KIM, Kyung Suk OH
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a package substrate, a power module on a first surface of the package substrate, a connector on the first surface of the package substrate, the connector being horizontally spaced apart from the power module, a first semiconductor chip on a second surface of the package substrate opposite to the first surface, and a first heat radiator on the second surface of the package substrate, the first heat radiator covering the first semiconductor chip. The first semiconductor chip vertically overlaps the power module, and the first semiconductor chip is electrically connected through the package substrate to the power module.
Claims20
A semiconductor package comprising:
- a package substrate;
- a power module on a first surface of the package substrate;
- a connector on the first surface of the package substrate, the connector being horizontally spaced apart from the power module;
- a first semiconductor chip on a second surface of the package substrate opposite to the first surface;
- a dielectric layer on the second surface of the package substrate, the dielectric layer surrounding the first semiconductor chip;
- a first heat radiator on the second surface of the package substrate, the first heat radiator covering a bottom surface of the first semiconductor chip and a bottom surface of the dielectric layer;
- and
- a vertical connection terminal disposed on one side of the first semiconductor chip, the vertical connection terminal connecting the package substrate and the first heat radiator,
- wherein at least a portion of the first semiconductor chip vertically overlaps the power module, and
- wherein the first semiconductor chip is electrically connected through the package substrate to the power module.
A semiconductor package comprising:
- a package substrate having a central region and a peripheral region on opposite sides of the central region, the peripheral region being at an outer edge of the package substrate;
- a power module on the central region and on a first surface of the package substrate;
- a connector on the peripheral region and on the first surface of the package substrate;
- a first semiconductor chip on a second surface of the package substrate;
- and
- a dielectric layer on the package substrate and surrounding the first semiconductor chip;
- a heat radiator on the second surface of the package substrate, the heat radiator covering the first semiconductor chip and the dielectric layer;
- and
- a vertical connection terminal disposed on one side of the first semiconductor chip, the vertical connection terminal connecting the package substrate and the heat radiator,
- wherein the first semiconductor chip includes:
- a first interposer on the package substrate;
- a die stack on the first interposer and including a plurality of vertically stacked first dies;
- a second die on the first interposer and horizontally spaced apart from the die stack;
- and
- a molding layer on the first interposer and surrounding the die stack and the second die, the molding layer exposing a top surface of the die stack, and
- wherein the semiconductor package is connected to an external device through a cable coupled to the connector.
Dependencies are inferred from the claim text.