Electronic chips

A method for manufacturing a plurality of electronic chips from a structure, the structure including:

• a plurality of integrated circuits formed in and on a semiconductor substrate;
• at least one connection metallization per integrated circuit formed on a side of a front face of the semiconductor substrate, the at least one connection metallization having a first surface and a second surface, the first surface transverse the second surface;
• and
• a first passivation layer covering the front face of the semiconductor substrate, the first passivation layer including openings in line with the connection metallization of the integrated circuits, the first passivation layer being on the first and second surfaces of the at least one connection metallization;
• the method including a step of depositing a second passivation layer on lateral surfaces of the semiconductor substrate, the second passivation layer being made of a parylene, and the first passivation layer and the second passivation layer being in contact on the side of the front face of the semiconductor substrate.

A device, comprising:

• an electronic chip, including:
• a substrate having a first surface and a second surface, the first surface transverse the second surface;
• a first passivation layer on the first surface of the substrate;
• at least one connection metallization on the first surface of the substrate and extending through the first passivation layer, the at least one connection metallization having a third surface and a fourth surface, the third surface transverse the fourth surface, the third opposite the first surface, the first passivation layer being on portions of the third surface;
• and
• a second passivation layer on the second surface of the substrate and the first passivation layer.