Semiconductor device packages
AssigneeApplied Materials, Inc.
InventorsSteven VERHAVERBEKE, Han-Wen CHEN
Life of this patent
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Abstract
The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded double-sided dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.
Claims20
A method comprising:
- disposing a substrate on a first insulating film, the substrate including one or more features formed therein;
- disposing one or more semiconductor die between the one or more features of the substrate;
- disposing a protective film over the substrate and the one or more semiconductor die;
- exposing the substrate to a first lamination process;
- disposing a second insulating film over the substrate;
- exposing the substrate to a second lamination process;
- curing the second insulating film;
- and
- forming one or more through-assembly vias extending through the substrate and the insulating film.
A method comprising:
- providing a substrate having at least one feature formed therein;
- placing at least one semiconductor die in association with the at least one feature, the semiconductor die having electrical contacts disposed on opposing major surfaces;
- applying at least one insulating material over the substrate and the at least one semiconductor die;
- laminating the substrate and the at least one semiconductor die with the insulating material;
- curing the insulating material;
- and
- forming at least one opening extending through the substrate and the insulating material to expose the electrical contacts on both major surfaces of the semiconductor die.
A method comprising:
- forming a cavity and a plurality of vias in a substrate;
- disposing a semiconductor die within the cavity, the semiconductor die having electrical contacts on a first side and a second side;
- applying an insulating layer over the substrate and the semiconductor die;
- laminating the substrate with the insulating layer;
- curing the insulating layer;
- and
- forming an opening through the substrate and the insulating layer to expose the electrical contacts on both the first side and the second side of the semiconductor die.
Dependencies are inferred from the claim text.