Fan-out semiconductor package having under-bump metallurgy

A semiconductor package comprising:

• a semiconductor chip;
• a connector connected to the semiconductor chip;
• a molding member sealing the semiconductor chip and the connector;
• a first redistribution layer disposed over the molding member and the connector, and including a first redistribution pattern and a first dielectric layer;
• a second redistribution layer disposed on the first redistribution layer and including a second redistribution pattern and a second dielectric layer;
• and
• an under-bump metallurgy (UBM) pad disposed on the second redistribution layer;
• wherein the second redistribution pattern includes a redistribution pad that aligns with the UBM pad in a third direction and has an area larger than an area of the UBM pad;
• wherein the first redistribution pattern includes a plurality of first redistribution lines comprising a first line and a second line, extending in a second direction perpendicular to a first direction, a first edge of the redistribution pad aligned in the third direction with the first line and a second edge of the redistribution pad aligned in the third direction with the second line;
• wherein a first side surface of the first line faces opposite in the first direction to a second side surface of the first line, and a first side surface of the second line faces opposite in the first direction to a second side surface of the second line;
• wherein the first side surface of the first line is located farther away from a center of the UBM pad in the first direction than the second side surface of the first line, and the first side surface of the second line is located farther away from a center of the UBM pad in the first direction than the second side surface of the second line;
• and
• wherein a distance between the first side surface of the first line and the first side surface of the second line is larger than a measurement of the redistribution pad in the first direction.

A semiconductor package comprising:

• a semiconductor chip;
• a connector connected to the semiconductor chip;
• a molding member over the semiconductor chip and the connector;
• a first redistribution layer disposed over the molding member and the connector and including a first redistribution pattern and a first dielectric layer;
• a second redistribution layer disposed on the first redistribution layer and including a second redistribution pattern and a second dielectric layer;
• and
• an under-bump metallurgy (UBM) pad disposed on the second redistribution layer;
• wherein the second redistribution pattern includes a redistribution pad that overlaps the UBM pad in a third direction and has a side surface that extends beyond a side surface of the UBM pad in a first direction;
• wherein the first redistribution pattern includes a plurality of first redistribution lines comprising a first line and a second line, wherein the first line and the second line extend in a second direction perpendicular to the first direction and the third direction, wherein a first edge of the redistribution pad overlaps the first line in the third direction and a second edge of the redistribution pad overlaps with the second line in the third direction;
• wherein a first side surface of the first line faces in an opposite direction to a second side surface of the first line, and a first side surface of the second line faces in an opposite direction to a second side surface of the second line;
• and
• wherein the second side surface of the first line and the second side surface of the second line overlap the redistribution pad in the third direction, wherein the first side surface of the first line extends farther in the first direction from a center of the UBM pad than the first edge of the redistribution pad extends from the center of the UBM pad, and the first side surface of the second line extends farther in the first direction from a center of the UBM pad than the second edge of the redistribution pad extends from the center of the UBM pad.