Three-dimensional memory device with bit lines located in different vertical levels and method of making the same

A method of forming a semiconductor structure, comprising:

• providing a first memory die that comprises first alternating stacks of first insulating layers and first electrically conductive layers, first memory openings vertically extending through the first alternating stacks, first memory opening fill structures located in the first memory openings, and first bit lines, wherein the first alternating stacks are laterally spaced apart from each other by first lateral isolation trenches that laterally extend along a first horizontal direction, wherein each of the first memory opening fill structures comprises a respective first vertical semiconductor channel, a respective vertical stack of first memory elements, and a respective first drain region contacting a first end of the respective first vertical semiconductor channel, wherein the first electrically conductive layers comprise first word lines of the first memory elements of the first memory opening fill structures, and wherein the first bit lines extend over each of the first alternating stacks along a second horizontal direction that is perpendicular to the first horizontal direction, are electrically connected to a respective first subset of the first drain regions, are vertically spaced by a first vertical distance from a first horizontal plane including top surfaces of the first drain regions, and have a uniform pitch p along the first horizontal direction;
• providing an additional semiconductor die that comprises second bit lines having a pitch that equals the uniform pitch p;
• and
• bonding the additional semiconductor die to the first memory die such that the second bit lines extend over the first bit lines along the second horizontal direction, are electrically connected to a respective second subset of the first drain regions, are vertically spaced by a second vertical distance that is greater than the first vertical distance from the first horizontal plane, and have the uniform pitch p along the first horizontal direction.

A method of forming a semiconductor structure, comprising:

• forming an assembly of first alternating stacks of first insulating layers and first electrically conductive layers and first memory opening fill structures vertically extending through the first alternating stacks, wherein the first alternating stacks are laterally spaced apart from each other by first lateral isolation trenches that laterally extend along a first horizontal direction, wherein each of the first memory opening fill structures comprises a respective first vertical semiconductor channel, a respective vertical stack of first memory elements, and a respective first drain region contacting a first end of the respective first vertical semiconductor channel, and wherein the first electrically conductive layers comprise first word lines of the first memory elements of the first memory opening fill structures;
• forming first bit lines extending over each of the first alternating stacks along a second horizontal direction that is perpendicular to the first horizontal direction, wherein the first bit lines are electrically connected to a respective first subset of the first drain regions, are vertically spaced by a first vertical distance from a first horizontal plane including top surfaces of the first drain regions, and have a uniform pitch p along the first horizontal direction;
• and
• forming second bit lines extending over the first bit lines along the second horizontal direction, wherein the second bit lines are electrically connected to a respective second subset of the first drain regions, are vertically spaced by a second vertical distance that is greater than the first vertical distance from the first horizontal plane, and have the uniform pitch p along the first horizontal direction.