Fully molded semiconductor structure with through silicon via (tsv) vertical interconnects

A method of making a semiconductor device, comprising:

• providing a large semiconductor die comprising conductive interconnects with a first encapsulant disposed over four side surfaces of the large semiconductor die, over the active surface of the large semiconductor die, and around the conductive interconnects;
• forming a first build-up interconnect structure over the large semiconductor die and over the first encapsulant;
• forming vertical conductive interconnects over the first build-up interconnect structure and around an embedded device mount site;
• disposing an embedded device over the embedded device mount site, wherein the embedded device comprises through silicon vias (TSVs);
• disposing a second encapsulant over the build-up structure, and around at least five sides of the embedded device;
• and
• forming a second build-up structure disposed over the planar surface and configured to be electrically coupled to the TSVs of the embedded device and the vertical conductive interconnects.

A semiconductor device, comprising:

• a large semiconductor die comprising conductive interconnects with a first encapsulant disposed over four side surfaces of the large semiconductor die, over the active surface of the large semiconductor die, and around the conductive interconnects;
• a first build-up interconnect structure disposed over the large semiconductor die and over the first encapsulant;
• vertical conductive interconnects disposed over the first build-up interconnect structure and around an embedded device mount site;
• an embedded device disposed over the embedded device mount site, wherein the embedded device comprises through silicon vias (TSVs);
• a second encapsulant disposed over the build-up structure, and around at least five sides of the embedded device;
• and
• a second build-up structure disposed over the planar surface and configured to be electrically coupled to the TSVs of the embedded device and the vertical conductive interconnects.