Overlay mark and overlay method of semiconductor structure
AssigneeUnited Microelectronics Corp.
InventorPo-Tsang Chen
Life of this patent
Estimating the term…
Loading patent…
AssigneeUnited Microelectronics Corp.
InventorPo-Tsang Chen
Estimating the term…
The invention provides an overlay mark, which comprises four sub-overlay marks, which together form an overlay mark, wherein each sub-overlay mark comprises a substrate and defines an inner region and an outer region, a plurality of first mandrel structures located in the inner region and a plurality of second mandrel structures located in the outer region, wherein the first mandrel structures are arranged in parallel with each other, and the second mandrel structures are also arranged in parallel with each other, and a plurality of strip-shaped mask layers are located in the inner region, wherein both sides of any first mandrel structure comprise a strip-shaped mask layer respectively. In addition, the invention also provides an overlay method of the semiconductor structure using the overlay mark.
An overlay mark comprising:
An overlay measurement method of a semiconductor structure, comprising:
Dependencies are inferred from the claim text.