Microelectronic devices and related memory devices

A microelectronic device, comprising:

• a block array region comprising blocks horizontally extending in parallel in a first direction and separated from one another in a second direction orthogonal to the first direction by insulative slot structures, the blocks respectively comprising a stack of local word line (LWL) structures;
• a global word line (GWL) region comprising a stack of GWL structures, the stack of GWL structures horizontally extending in the second direction and vertically overlapping the stack of LWL structures of respective ones of the blocks of the block array region;
• and
• a block select (BS) region horizontally interposed between the block array region and the GWL region in the first direction, the BS region comprising BS devices respectively vertically overlapping and horizontally extending between the stack of GWL structures of the GWL region and the stack of LWL structures of the respective ones of the blocks of the block array region.

A memory device, comprising:

• blocks respectively comprising:
• local word line (LWL) structures vertically stacked relative to one another;
• and
• strings of memory cells vertically extending through the LWL structures;
• a global word line (GWL) stack comprising GWL structures at vertical elevations of the LWL structures of respective ones of the blocks;
• and
• block select (BS) devices horizontally interposed between the GWL stack and the blocks and respectively comprising transistors at the vertical elevations of the LWL structures of the respective ones of the blocks, the transistors individually horizontally extending from one of the GWL structures of the GWL stack to one of the LWL structures of one of the blocks.