Microelectronic devices, memory devices, and associated systems and methods

An electronic system, comprising:

• an input device;
• an output device;
• a processor device operably coupled to the input device and the output device;
• and
• a memory device operably coupled to the processor device;
• the memory device comprising a microelectronic device comprising:
• blocks horizontally extending in parallel in a first direction and horizontally separated from one another in a second direction orthogonal to the first direction, the blocks respectively comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers;
• and
• at least one BS device vertically offset from and within a horizontal area of one of the blocks, the at least one BS device horizontally extending in parallel with the blocks in the first direction.

A memory device comprising:

• two planes respectively comprising:
• two blocks;
• and
• an array of BS devices comprising a row of double-gated BS devices, the double-gated BS devices of the row respectively including two transistors sharing a source region;
• and
• a space defined between the two planes, one of the two planes comprising an end row of BS devices in the array of BS devices, the end row of BS devices positioned proximate to the space and comprising single-gated BS devices respectively including only one transistor.