Semiconductor memory device and a manufacturing method of the semiconductor memory device

A method of manufacturing a semiconductor memory device, the method comprising:

• forming a preliminary memory cell array structure including a first interlayer insulating layer including a first surface and a second surface facing in opposite directions, a plurality of conductive patterns and a plurality of second interlayer insulating layers stacked alternately with each other over the second surface of the first interlayer insulating layer, a channel layer passing through the first interlayer insulating layer, the plurality of conductive patterns, and the plurality of second interlayer insulating layers, and a memory layer between each of the plurality of conductive patterns and the channel layer;
• forming an amorphous doped semiconductor layer on the first surface of the first interlayer insulating layer;
• forming a doped semiconductor layer including a crystalline area and an amorphous area between the crystalline area and the first interlayer insulating layer by crystallizing a surface of the amorphous doped semiconductor layer;
• and
• diffusing impurities in the doped semiconductor layer into the channel layer.