US 2026/0040531 A1 · SEMICONDUCTOR AND METHOD OF MANUFACTURING THE SAME

Abstract

Embodiments of this disclosure provide a semiconductor structure, including a substrate, a bit line structure disposed over the substrate, a spacer structure disposed on and extending along a sidewall of the bit line structure, and a bit line contact disposed in each of the plurality of active areas and contacting a bottom portion of the second spacer. The spacer structure includes a first spacer surrounding a sidewall of the bit line structure and a second spacer surrounding a lower portion of a sidewall of the first spacer. A top surface of the first spacer is higher than a top surface of the second spacer. Additionally, a method of manufacturing a semiconductor structure is also disclosed in this disclosure.

Claims20

Dependent claims

A method of manufacturing a semiconductor structure, comprising:

providing a substrate comprising a plurality of active areas and a plurality of insulation areas, wherein each of the plurality of insulation areas is located between adjacent two of the plurality of active areas;
forming each of a plurality of bit line contacts in each of the active areas, respectively, and each of a plurality of bit line structures on each of the plurality of bit line contacts, respectively;
depositing a first oxide layer covering the plurality of bit line structures;
depositing a second oxide layer on the first oxide layer;
forming a photoresist layer to completely cover the second oxide layer;
and
removing an upper portion of the second oxide layer to expose an upper portion of the first oxide layer.

4 more elements

Dependencies are inferred from the claim text.

Semiconductor and method of manufacturing the same

Life of this patent

Semiconductor and method of manufacturing the same

Life of this patent

Abstract

Claims20