Shared high dynamic range rolling shutter architecture with lateral overflow integration capacitor shuffle-gate extension

An array of CMOS image sensor pixels, the array comprising:

• a plurality of CMOS image sensor pixels arranged in columns and rows with a separate row control line for each row, and a separate column readout line for each column, where each CMOS image sensor pixel comprises:
• a photodiode;
• a floating diffusion node at a cathode of a reverse biased diode;
• a transfer gate connected between the photodiode and the floating diffusion node;
• a source follower gate connected to the floating diffusion node;
• a row select gate which connects an output of the source follower SF to a Voutput line, where the Voutput line is connected to the column readout line for the particular pixel;
• a reset transistor connected to the floating diffusion node;
• and
• a skim transistor connected between the floating diffusion node and a virtually pinned diode, the virtually pinned diode further connected to a shuffle store gate and a shuffle reset gate, where the shuffle store gate is connected to ground via an integrating capacitor, and the shuffle reset gate is connected to a shuffle supply line connected to the row control line, where the row control line is connected to a voltage supply.

An image sensor comprising:

• a control circuit in electrical communication with a row decoder and row driver block and with a column readout circuit, the row decoder and row driver block and the column readout circuit in electrical communication with an array of CMOS image sensor pixels arranged in columns and rows with a separate row control line for each row, and a separate column readout line for each column, where each individual CMOS image sensor pixel of the array comprises:
• a photodiode;
• a floating diffusion node at a cathode of a reverse biased diode;
• a transfer gate connected between the photodiode and the floating diffusion node;
• a source follower gate connected to the floating diffusion node;
• a row select gate which connects an output of the source follower to a Voutput line, where the Voutput line is connected to the column readout line for the particular pixel;
• a reset transistor connected to the floating diffusion node;
• and
• a skim transistor connected between the floating diffusion node and a virtually pinned diode, the virtually pinned diode further connected to a shuffle store gate and a shuffle reset gate, where the shuffle store gate is connected to ground via an integrating capacitor, and the shuffle reset gate is connected to a shuffle supply line connected to the row control line, where the row control line is connected a voltage supply.