Memory device having window centering
AssigneeMicron Technology, Inc.
InventorsEric S. Carman, Jordan Scott Belisle
Life of this patent
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Abstract
A variety of applications can include an apparatus having a three-dimensional (3D) memory device with a mechanism for window centering for zeros and ones sensing. A 3D memory device can be constructed to implement a window centering scheme to add charge to the reference side of a sense amplifier such that a process window is centered between a voltage for a zero and a voltage for a one on a reference side of the sense amplifier. A 3D DRAM device can be constructed to selectively apply an idle bias to a local digit line, where the idle bias has a voltage in a range to optimize data retention or a reference voltage to the local digit line to bias the local digit line to a centering voltage.
Claims20
A three-dimensional memory device comprising:
- an array of memory cells, the memory cells arranged in tiers;
- a local digit line coupled to a set of the memory cells of the array in different tiers;
- a switch arranged to select one of multiple voltage sources;
- a bleeder supply circuit coupled to the switch and to the local digit line, the bleeder supply circuit arranged to set the local digit line to a voltage based on selection of the switch;
- and
- a global digit line coupled to the local digit line.
A method of operating a three-dimensional memory device, the method comprising:
- charging, using a switch arranged to select one of multiple sources, a local digit line to a local digit line reference voltage from an idle digit line voltage through a bleeder supply circuit coupled to the local digit line before a digit line multiplexer turns on, the local digit line coupled to the digit line multiplexer and coupled to a set of memory cells in different tiers of an array of memory cells of the three-dimensional memory device;
- switching the bleeder supply circuit off;
- and
- sharing, after the bleeder supply circuit turns off, the local digit line reference voltage from the local digit line to a global digit line coupled to the digit line multiplexer.
A method of forming a three-dimensional memory device, the method comprising:
- forming an array of memory cells arranged in tiers;
- forming a local digit line coupled to a set of the memory cells of the array in different tiers;
- forming a switch arranged to select one of multiple voltage sources;
- forming a bleeder supply circuit coupled to the switch and to the local digit line, with the bleeder supply circuit arranged to set the local digit line to a voltage based on selection of the switch;
- and
- forming a global digit line coupled to the local digit line.
Dependencies are inferred from the claim text.