Generating hardware description language slices to provide context for violations

A non-transitory computer-readable medium comprising stored instructions, which when executed by a processor, cause the processor to:

• analyzing hardware description language (HDL) code to identify a violation, wherein the HDL code describes an IC design, and wherein the violation specifies a line in the HDL code;
• parse the HDL code to obtain a digital representation of the IC design;
• determine connectivity information and semantic information of objects in the digital representation of the IC design;
• identify a first object in the digital representation of the IC design which corresponds to the line in the HDL code;
• use the connectivity information and the semantic information to identify a set of objects in the digital representation of the IC design which are related to the first object;
• and
• select a set of lines in the HDL code which correspond to the set of objects in the digital representation of the IC design.

A system, comprising:

• a memory storing instructions;
• and
• a processor, coupled with the memory and to execute the instructions, the instructions when executed causing the processor to:
• perform static verification on hardware description language (HDL) code to identify a static violation, wherein the HDL code describes an IC design, and wherein the static violation specifies a line in the HDL code;
• parse the HDL code to obtain a digital representation of the IC design;
• determine connectivity information and semantic information of objects in the digital representation of the IC design;
• identify a first object in the digital representation of the IC design which corresponds to the line in the HDL code;
• use the connectivity information and the semantic information to identify a set of objects in the digital representation of the IC design which are related to the first object;
• and
• select a set of lines in the HDL code which correspond to the set of objects in the digital representation of the IC design, wherein selecting the set of lines in the HDL code includes identifying a lexical block corresponding to a second object in the set of objects and identifying one or more lines in the HDL code corresponding to the lexical block.