Enhanced error handling in memory systems
AssigneeMicron Technology, Inc.
InventorsJiejuan Liu, Yee Yang Tay
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsJiejuan Liu, Yee Yang Tay
Estimating the term…
Methods, systems, and devices for enhanced error handling in memory systems are described. A memory system may enter a read error handling procedure to recover data from a memory cell. For example, the memory system may perform multiple read operations at respective first read levels to identify a voltage valley associated with the data in the memory cell. Based on identifying the voltage valley, the memory system may read the data from the memory cell according to a second read level, where the second read level may be based on one of the first read levels, a first learning rate parameter, and a first momentum parameter. The memory system may determine whether to exit the error handling procedure or continue with the error handling procedure based on whether the data was successfully decoded in response to the read operation at the second read level.
A memory system, comprising:
(canceled)
A method for operating a memory system, comprising:
(canceled)
A non-transitory computer-readable medium storing code for operating a memory system, the code comprising instructions executable by one or more processors to:
Dependencies are inferred from the claim text.