Digital compute-in-memory system with multicast weight words, method of operating same and method of manufacturing same

A digital compute-in-memory (DCIM) system comprising:

• in a first region of a semiconductor die, memory cells, multipliers and adder trees;
• the memory cells and the multipliers being arranged in corresponding weighting-arrays and multiplying-arrays;
• each weighting-array including one or more weight-rows, and each of the one more weight-rows correspondingly representing one or more weight-words;
• the multiplying-arrays being coupled to an input-array of input-words, the input-array being arranged into input-rows,
• each of the multiplying-arrays being coupled to each of the input-rows;
• the multiplying-arrays and the weighting-arrays being organized into pairs;
• for each of the pairs, and for a selected one of the one or more weight-rows of the corresponding weighting-array,
• each of the multipliers being coupled in parallel to the selected weight-row;
• each of the multiplying-arrays being configured to generate products which correspondingly are input-row-specific;
• and
• the adder trees being configured to add corresponding ones of the input-row-specific products resulting in input-row-specific sums, the sums representing an output of the DCIM system.

A compiler for compiling a circuit arrangement useable with a digital compute-in-memory (CIM) (DCIM) system (DCIM compiler), the DCIM compiler comprising at least one processor and at least one non-transitory computer readable medium that stores computer executable code, the at least one non-transitory computer readable storage medium, the computer program code and the at least one processor being configured to cause the memory compiler system to do as follows including:

• receiving parameters including:
• for an input-array of input-columns, a first parameter representing a quantity of input-channels, the input-channels corresponding to input-rows of the input-array;
• for weighting-arrays of the DCIM system, a second parameter representing a quantity of rows in each of the weighting-arrays;
• and
• for multiplying-arrays of the DCIM system, a third parameter representing a quantity of two or more compute-rows for each of the multiplying-arrays, each of compute-rows corresponding to a multiplier;
• and
• generating a compiled DCIM macro representing the circuit arrangement based on the first, second and third parameters;
• the macro locating the multiplying-arrays and the weighting-arrays in a first region of a semiconductor die;
• the multiplying-arrays and the weighting-arrays being organized into pairs;
• and
• for each of the pairs, and for a selected one of one or more weight-rows of the corresponding weighting-array,
• each of the multipliers being coupled in parallel to the selected weight-row.