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US 2026/0037142 A1Published application
Partial blocks word line read offsets
AssigneeMicron Technology, Inc.
InventorsChristina Papagianni, Murong Lang, Guang Hu
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsChristina Papagianni, Murong Lang, Guang Hu
Estimating the term…
A memory sub-system controller selectively adjusts read threshold voltages on certain word lines for partially written memory blocks of a memory sub-system. The controller generates a request to read a portion of a set of memory components. The controller, in response to determining that the portion corresponds to a partially programmed block (PB), selectively modifies a boundary word line (WL) read level offset, stored in a boundary WL offset table, by applying an adjustment factor to the boundary WL read level offset. The controller reads a first set of data from one or more inner WLs of the portion using a first read level offset retrieved from an inner WL offset table and reads a second set of data from a boundary WL of the portion using the selectively modified boundary WL read level offset.
A system comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by at least one processing device, cause the at least one processing device to perform operations comprising:
Dependencies are inferred from the claim text.