Enhanced chip select signal training
AssigneeQUALCOMM Incorporated
InventorsFarrukh AQUIL, Boris Dimitrov ANDREEV, Joon Young PARK, Yong XU, Vishal MISHRA
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AssigneeQUALCOMM Incorporated
InventorsFarrukh AQUIL, Boris Dimitrov ANDREEV, Joon Young PARK, Yong XU, Vishal MISHRA
Estimating the term…
In some aspects, a memory device may receive a command to enter a chip select training mode, may perform a chip select training operation for a sampling window using a clock signal with a first frequency and a chip select signal having a pattern of high and low pulses, and may provide results of the training operation for high pulses via a first data in or out (DQ) signal and for low pulses via a second DQ signal. The memory device may receive a command to exit the chip select training mode, may process only certain commands while in the training mode, and may maintain the training results until reset by a host device. The controller may also be configured to alternate sampling on different clock edges and to reduce the frequency of the clock signal prior to exiting the training mode for improved reliability. Numerous other aspects are described.
A memory device, comprising:
A method performed by a memory device having a memory and a controller configured to couple to the memory and coupled to a host through an interface having a clock signal, a chip select signal, a first data in or out (DQ) signal, and a second DQ signal, comprising:
Dependencies are inferred from the claim text.