Transistors including passivation modulation and related fabrication methods
AssigneeMACOM Technology Solutions Holdings, Inc.
InventorsHeather Frances Barton, Matthew Russell King
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Abstract
A transistor device includes a semiconductor structure, a multi-layer passivation stack on the semiconductor structure, source and drain contacts on the semiconductor structure, and a gate on the semiconductor structure between the source and drain contacts. The multi-layer passivation stack includes a plurality of passivation layers having different electrical properties, and at least one opening extending through the passivation layers. The at least one opening exposes a surface of the semiconductor structure between the gate and the source or drain contact.
Claims29
A transistor device, comprising:
- a semiconductor structure;
- a multi-layer passivation stack on the semiconductor structure;
- source and drain contacts on the semiconductor structure;
- and
- a gate on the semiconductor structure between the source and drain contacts,
- wherein the multi-layer passivation stack comprises a plurality of passivation layers having different electrical properties and at least one opening extending therethrough that exposes a surface of the semiconductor structure between the gate and the source or drain contact.
A transistor device, comprising:
- a semiconductor structure;
- source and drain contacts on the semiconductor structure;
- a gate on the semiconductor structure between the source and drain contacts;
- and
- first and second passivation layers on a surface of the semiconductor structure between the gate and the source or drain contact, the first and second passivation layers having different electrical properties and extending along respective interfaces with the semiconductor structure.
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A method of fabricating a transistor device, the method comprising:
- forming a multi-layer passivation stack on a semiconductor structure, the multi-layer passivation stack comprising a plurality of passivation layers having different electrical properties;
- forming source and drain contacts on the semiconductor structure;
- forming a gate opening in the multi-layer passivation stack;
- and
- forming at least one additional opening in the multi-layer passivation stack that exposes a surface of the semiconductor structure between the gate opening and the source or drain contact.
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Dependencies are inferred from the claim text.