US 2026/0031801 A1 · BUFFER CIRCUIT AND IMAGING DEVICE

Abstract

Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.

Claims15

Dependent claims

A buffer circuit, comprising:

a first transistor having a gate to which an input signal is input;
a current source connected to one terminal of the first transistor;
a second transistor connected to another terminal of the first transistor;
an output terminal connected to the one terminal or the another terminal of the first transistor;
and
first and second capacitors provided between the current source and a gate of the second transistor,
the first transistor, the second transistor, and the first capacitor forming a first feedback circuit,
the first transistor, the current source, and the second capacitor forming a second feedback circuit.

5 more elements

Dependencies are inferred from the claim text.

Buffer circuit and imaging device

Life of this patent

Buffer circuit and imaging device

Life of this patent

Abstract

Claims15