Dynamic error monitor and repair
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHiroki Noguchi, Ku-Feng Lin, Yih Wang
Life of this patent
Estimating the term…
Abstract
A memory device includes: a memory cell array comprising a plurality of memory cells, the plurality of memory cells comprising a plurality of data memory cells including a first data memory cell and a plurality of backup memory cells including a first backup memory cell; a storage storing an error table configured to record errors in the plurality of data memory cells, the error table including a plurality of error table entries, each error table entry corresponding to one of the plurality of data memory cell and having an address and a failure count; and a controller configured to replace the first data memory cell with the first backup memory cell based on the error table.
Claims20
A memory device, comprising:
- a memory configured to store an error table that tracks failures of data memory cells;
- and
- a controller configured to:
- receive an address of a failed memory cell;
- increase a failure count associated with the failed memory cell in the error table by one;
- compare the failure count of the address of the failed memory cell to a second failure count of a second address in the error table;
- and
- designate a deactivated data memory cell associated with the second address as a restored data memory cell and replace the failed memory cell with a backup memory cell that previously replaced the deactivated data memory cell.
A memory device, comprising:
- a memory configured to store an error table that tracks failure counts of data memory cells;
- an error correction code circuit configured to:
- detect errors of memory cells during operation;
- an error monitor circuit configured to:
- monitor the error correction code circuit to receive an address of a failed memory cell that had an error occur, and
- provide the address of the failed memory cell;
- and
- a controller configured to:
- receive the address of the failed memory cell from the error monitor circuit;
- increase a failure count associated with the failed memory cell in the error table by one;
- compare the failure count of the address of the failed memory cell to a second failure count of a second address in the error table;
- designate a deactivated data memory cell associated with the second address as a restored data memory cell and replace the failed memory cell with a backup memory cell that previously replaced the deactivated data memory cell.
A method, comprising:
- receiving an address of a failed memory cell from an error monitor circuit;
- increasing a failure count associated with the failed memory cell in an error table by one;
- comparing the failure count of the address of the failed memory cell to a second failure count of a second address in the error table;
- designating a deactivated data memory cell associated with the second address as a restored data memory cell and replace the failed memory cell with a backup memory cell that previously replaced the deactivated data memory cell;
- and
- transferring data stored in the failed memory cell to the backup memory cell.
Dependencies are inferred from the claim text.