Impedance calibration in a memory sub-system

A memory device comprising:

• a memory array comprising a plurality of memory cells;
• an input/output (I/O) circuit comprising an output buffer coupled to the memory array;
• and
• an impedance (ZQ) calibration circuit coupled to the I/O circuit, the ZQ calibration circuit comprising a first set of calibration units and a second set of calibration units, the ZQ calibration circuit to perform operations comprising:
• generating, by the first set of calibration units comprising a first calibration unit and a second calibration unit, a first ZQ calibration code comprising a first sequence of bit values, wherein at least one bit value of the first sequence is generated by a first transistor set of the first calibration unit and a second transistor set of the second calibration unit;
• providing, by the first set of calibration units, the first ZQ calibration code to one or more pull-up units of the output buffer, wherein the first ZQ calibration code is used to calibrate a first impedance of the one or more pull-up units;
• generating, by a second set of calibration units, a second ZQ calibration code comprising a second sequence of bit values;
• and
• providing, by the second set of calibration units, the second ZQ calibration code to one or more pull-down units of the output buffer, wherein the second ZQ calibration code is used to calibrate a second impedance of the one or more pull-down units.

A method comprising:

• generating, by a first set of calibration units comprising a first calibration unit and a second calibration unit, a first impedance (ZQ) calibration code comprising a first sequence of bit values, wherein at least one bit value of the first sequence is generated by a first transistor set of the first calibration unit and a second transistor set of the second calibration unit;
• providing the first ZQ calibration code to one or more pull-up units of an output buffer of an input/output circuit of a memory device, wherein the first ZQ calibration code is used to calibrate a first impedance of the one or more pull-up units;
• generating, by a second set of calibration units and a third set of calibration units, a second ZQ calibration code comprising a second sequence of bit values;
• and
• providing the second ZQ calibration code to one or more pull-down units of the output buffer, wherein the second ZQ calibration code is used to calibrate a second impedance of the one or more pull-down units.