Systems and methods for massively parallel trimming of semiconductor devices
AssigneeAnora, LLC
InventorsSasikumar P. Cherubal, Pramodchandran N. Variyam, Avinash Virupakshaiah Pura
Life of this patent
Estimating the term…
Loading patent…
AssigneeAnora, LLC
InventorsSasikumar P. Cherubal, Pramodchandran N. Variyam, Avinash Virupakshaiah Pura
Estimating the term…
Systems and methods for massively parallel trimming of semiconductor devices include a thermal testing system configured for: receiving a first signal from a device under test, the first signal having an unknown first frequency; receiving a second signal from a local oscillator at a known second frequency; mixing the first signal and the second signal; filtering the mixed signal through a low-pass filter circuit; digitizing the filtered signal into a plurality of digital signal samples; windowing the plurality of digital signal samples within a frequency window; computing a discrete spectrum of the digital signal samples within the frequency window using a Fast Fourier Transform algorithm; fitting a plurality of consecutive frequency bins in the discrete spectrum to an interpolating function; evaluating the unknown first frequency based on the fitting; and electronically trimming the DUT according to the evaluated first frequency.
A method, comprising:
An apparatus, comprising:
A system, comprising:
Dependencies are inferred from the claim text.