Trellis assisted bit flipping decoder
AssigneeSK hynix Inc.
InventorsFan Zhang, Meysam Asadi, Haobo Wang
Life of this patent
Estimating the term…
Loading patent…
AssigneeSK hynix Inc.
InventorsFan Zhang, Meysam Asadi, Haobo Wang
Estimating the term…
Techniques related to improving the error correction performance of a bit-flipping (BF) decoder for decoding a codeword using one or more trellis decoders are described. In some examples, the BF decoder can identify a set of unsatisfied check nodes among a set of check nodes that can be decoded using a trellis decoder. The trellis decoder can perform trellis decoding on the set of unsatisfied check nodes and variable nodes connected to the set of unsatisfied check nodes to determine bit values of the variable nodes to resolve the set of unsatisfied check nodes identified by the BF decoding. The BF decoder can use the bit values of the variable nodes determined by the trellis decoding in a next iteration of the BF decoding to decode the codeword.
A method for decoding a low-density parity-check (LDPC) codeword, the method implemented on a computing device and comprising:
A device comprising:
Dependencies are inferred from the claim text.