Cryptocurrency miner with multiple power domains
AssigneeChain Reaction, Ltd.
InventorsYossi Smeloy, Gil Shefer, Rony Gutierrez
Life of this patent
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Abstract
A cryptocurrency miner includes a control power supply, a compute power supply, a compute module, and a controller. The compute module includes control circuitry powered based on first power supplied by the control power supply and a compute engine powered based on second power supplied by the compute power supply. The controller causes the control power supply to apply the first power to the control circuitry. The controller further causes the compute power supply to apply the second power to the compute engine after initialization of the control circuitry.
Claims20
A system, comprising:
- a first power supply;
- a second power supply;
- first application specific integrated circuits (ASICs) coupled in parallel to the first power supply and in series to the second power supply, wherein each first ASIC comprises a first circuit in a first power domain of the respective first ASIC and a second circuit in a second power domain of the respective first ASIC;
- and
- a controller configured to:
- generate one or more first control signals that selectively couple first electrical power from the first power supply to the first circuit and the first power domain of each first ASIC and selectively decouple second electrical power from the second circuit and the second power domain of each first ASIC;
- and
- generate one or more second control signals that selectively couple the first electrical power from the first power supply to the first circuit and the first power domain of each first ASIC and selectively couple the second electrical power from the second power supply to the second circuit and the second power domain of each first ASIC.
A system, comprising:
- a first power supply;
- a second power supply;
- first application specific integrated circuits (ASICs) coupled in parallel to the first power supply and in series to the second power supply, wherein each first ASIC comprises first control circuitry in a first power domain of the respective first ASIC and a first compute engines in a second power domain of the respective first ASIC;
- and
- a controller configured to:
- generate one or more first control signals that selectively couple the first power supply to the first control circuitry and the first power domain of each first ASIC and selectively decouple the second power supply from the first compute engines and the second power domain of each first ASIC;
- and
- generate one or more second control signals that selectively couple the first power supply to the first control circuitry and the first power domain of each first ASIC and selectively couple the second power supply to the first compute engines and the second power domain of each first ASIC.
Dependencies are inferred from the claim text.