Latch-up Free High Voltage Device

A method comprising:

• growing an epitaxial layer having a first conductivity type on a substrate having the first conductivity type;
• forming, in the epitaxial layer, a floating isolation ring of a second conductivity type, the isolation ring comprising a buried layer and sidewalls and enclosing a bulk region of the first conductivity type;
• forming, inside the bulk region, a first drain/source region, a second drain/source region, and a third drain/source region each having the second conductivity type, the second drain/source region being formed in a body region of the first conductivity type and disposed between the first drain/source region and the third drain/source region;
• forming a Schottky diode by constructing a metal contact over a well region of the second conductivity type inside the isolation ring such that the metal contact functions as an anode and the well region of the second conductivity type functions as a cathode;
• electrically coupling the Schottky diode to the isolation ring through the well region;
• forming a substrate metal contact and a conductive path from the substrate to the substrate metal contact through a contact plug, a region having the first conductivity type, a well having the first conductivity type, and the epitaxial layer;
• and
• connecting an anode contact of the Schottky diode to the substrate metal contact through an interconnect.

A method comprising:

• forming, on a substrate of a first conductivity type, an epitaxial layer of the first conductivity type;
• forming, in the epitaxial layer, a floating isolation ring of a second conductivity type that encloses a bulk region of the first conductivity type;
• within the bulk region, forming first, second, and third drain/source regions of the second conductivity type and a body region of the first conductivity type, the second drain/source region being between the first and third drain/source regions;
• forming back-to-back MOS transistors using the first, second, and third drain/source regions and the body region;
• forming, inside the isolation ring, a Schottky diode by constructing a metal contact over a well of the second conductivity type and coupling a cathode of the Schottky diode to the isolation ring;
• forming a resistive path from the substrate to ground;
• and
• configuring the Schottky diode to reduce conduction of a parasitic bipolar device, thereby suppressing initiation of parasitic thyristor conduction.

A method comprising:

• providing a substrate and an epitaxial layer each having a first conductivity type;
• forming, in the epitaxial layer, a floating isolation ring of a second conductivity type that forms a continuous closed loop in plan view and encloses a bulk region of the first conductivity type;
• forming, within the bulk region, first, second, and third drain/source regions of the second conductivity type and a body region of the first conductivity type;
• forming first and second gates to realize back-to-back MOS transistors between the first, second, and third drain/source regions;
• forming, inside the isolation ring, a Schottky diode by constructing a metal contact over a well of the second conductivity type and coupling the Schottky diode to the isolation ring;
• and
• forming a substrate contact and coupling the substrate to the substrate contact through a plurality of stacked regions of the first conductivity type formed outside the floating isolation ring.