Integrated circuit semiconductor element having heterogeneous gate structures and method of fabricating integrated circuit semiconductor element

An integrated circuit semiconductor element comprising:

• a substrate;
• a complementary field effect transistor (cFET) formed over the substrate and having a quadruple-gate structure in which nano sheet stacked structures are sequentially stacked;
• and
• a zebra fin FET (ZE FINFET) formed over the substrate, comprising a plurality of semiconductor layers and having a triple-gate structure, and spaced apart from the cFET in a first direction parallel to a surface of the substrate,
• wherein the cFET comprises a first active fin formed on the substrate, the nano sheet stacked structures formed over the first active fin, a first dielectric layer surrounding the nano sheet stacked structures, and a first gate electrode formed on the first dielectric layer,
• wherein the ZE FINFET comprises a second active fin formed on the substrate, a second dielectric layer surrounding the second active fin, and a second gate electrode formed on the second dielectric layer,
• wherein an upper surface of the second active fin is at a higher level than an upper surface of the first active fin in a second direction perpendicular to the surface of the substrate,
• wherein the second active fin has the plurality of semiconductor layers vertically spaced apart from each other, and
• wherein the cFET comprises transistors of different conductivity types stacked alternately in the second direction.

A method of fabricating an integrated circuit semiconductor element, the method comprising:

• preparing a substrate on which a first region and a second region are defined and spaced apart from each other in a first direction parallel to a surface of the substrate;
• forming a first active fin in the first region and a second active fin in the second region;
• forming nano sheet stacked structures, sequentially stacked in the first region;
• and
• forming a first gate electrode covering the first active fin, a second gate electrode covering the second active fin, a complementary field effect transistor (cFET) including the first active fin, and a zebra fin FET (ZE FINFET) including the second active fin,
• wherein, the first active fin extends in a second direction different from the first direction and parallel to the surface of the substrate and has a first height in the first region and the nano sheet stacked structures are formed over the first active fin,
• wherein, the second active fin extends in the second direction and has a second height in the second region,
• wherein, the cFET is formed by forming a first gate electrode having a quadruple-gate structure covering both side surfaces, an upper surface, and a lower surface of the nano sheet stacked structures in the first region,
• wherein, the ZE FINFET is formed by forming a second gate electrode having a triple-gate structure covering both side surfaces and an upper surface of the second active fin in the second region,
• wherein the second active fin comprises a zebra active pattern comprising a plurality of semiconductor layers vertically spaced apart from each other. and
• wherein the cFET comprises transistors of different conductivity types stacked alternately in the second direction.