Semiconductor memory device and manufacturing method of the semiconductor memory device

A semiconductor memory device, comprising:

• a first semiconductor pattern and a second semiconductor pattern over a lower structure;
• a lower contact plug disposed between the lower structure and the second semiconductor pattern;
• a gate stack structure disposed over the first and second semiconductor patterns and including a cell array region and a stepped region extending from the cell array region;
• a channel structure passing through the cell array region of the gate stack structure and extending into the first semiconductor pattern;
• a memory layer in contact with the channel structure;
• a first contact plug disposed in the stepped region of the gate stack structure;
• and
• an insulating structure surrounding a sidewall of the first contact plug to insulate the first contact plug from the gate stack structure,
• wherein the memory layer includes a first memory pattern surrounded by the first semiconductor pattern and a second memory pattern disposed between the channel structure and the gate stack structure, and
• wherein the first contact plug passes through the insulating structure and the second semiconductor pattern to contact the lower contact plug.