Substrate structure and method of manufacturing the same

A method of manufacturing substrate structure comprising:

• providing a substrate, the substrate includes a carrier, a circuit layer and a passivation layer, the circuit layer is formed on the carrier, covered by the passivation layer and has a plurality of pads, and each of the plurality of pads is visible from one of a plurality of passivation openings of the passivation layer;
• forming a first metal layer, the first metal layer covers the passivation layer and the plurality of pads located in the plurality of passivation openings, the first metal layer has a plurality of recessions, each of the plurality of recessions is formed in one of the plurality of passivation openings and is electrically connected to one of the plurality of pads;
• forming an insulating layer, the insulating layer covers the first metal layer and fills the plurality of recessions;
• patterning the insulating layer to form an insulating tapered part in each of the plurality of recessions, the first metal layer located around the insulating tapered part is visible, and the insulating tapered part has a base located in each of the plurality of recessions and a terminal protruding each of the plurality of recessions;
• forming a second metal layer, the second metal layer covers the insulating tapered part and the first metal layer located around the insulating tapered part, and the second metal layer is electrically connected to the first metal layer;
• forming a photoresist layer, the photoresist layer covers the second metal layer;
• patterning the photoresist layer to form a plurality of openings, the second metal layer covering the insulating tapered part is visible from each of the plurality of openings;
• forming a bonding layer in each of the plurality of openings, the bonding layer covers the second metal layer located in each of the plurality of openings and is electrically connected to the second metal layer, a thickness of the bonding layer is greater than that of the second metal layer;
• removing the photoresist layer, the bonding layer and the second metal layer not covered by the bonding layer are visible;
• and
• removing the first and second metal layers not covered by the bonding layer using the bonding layer as a mask, the second metal layer becomes a plurality of conductive layers, the first metal layer located under the insulating tapered part becomes a plurality of under bump metallizations (UBMs), each of the plurality of UBMs has one of the plurality of recessions, wherein the insulating tapered part, each of the plurality of conductive layers and the bonding layer form a tapered micro bump, and a maximum outer diameter of the tapered micro bump is less than or equal to 20 μm along a first direction.