Approximation values in look up tables
AssigneeHewiett Packard Enterprise Development LP
InventorsNathaniel William Jansen, Craig Warner
Life of this patent
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Abstract
In one implementation, a circuit includes an input having a plurality of input nodes including upper bit nodes and lower bit nodes. A look up table includes address inputs coupled to receive upper bits from the upper bit nodes. An interpolator includes an input coupled to the lower bit nodes. The interpolator is configured to simultaneously retrieve contents from a first look up table entry and a second look up table entry based on the upper bits and to estimate an approximated value using the lower bits and the contents retrieved from the first look up table entry and the second look up table entry.
Claims20
A circuit comprising:
- an input having a plurality of input nodes including upper bit nodes and lower bit nodes;
- a look up table (LUT) comprising address inputs coupled to receive upper bits from the upper bit nodes;
- and
- an interpolator with an input coupled to the lower bit nodes, the interpolator configured to simultaneously retrieve contents from a first look up table entry and a second look up table entry based on the upper bits and to estimate an approximated value using lower bits from the lower bit nodes and the contents retrieved from the first look up table entry and the second look up table entry.
A circuit comprising:
- an input having a plurality of input nodes including upper bit nodes, middle bit nodes and lower bit nodes;
- a look up table (LUT) comprising address inputs coupled to receive upper bits from the upper bit nodes;
- entry detection logic with an input coupled to the middle bit nodes;
- a first multiplexer with a data input coupled to an output of the LUT and a control input coupled to a first output of the entry detection logic;
- a second multiplexer with a data input coupled to the output of the LUT and a control input coupled to a second output of the entry detection logic;
- and
- an interpolator with a first input coupled to the lower bit nodes, a second input coupled to an output of the first multiplexer, and a third input coupled to an output of the second multiplexer.
A method comprising:
- receiving a look up table address having most significant bits and least significant bits;
- simultaneously retrieving, from a look up table, contents from a first look up table entry and a second look up table entry based on the most significant bits of the look up table address;
- determining a slope based on the contents of the first look up table entry and the contents of the second look up table entry;
- and
- estimating an approximated value using the least significant bits of the look up table address, the determined slope, and the contents of the first look up table entry.
Dependencies are inferred from the claim text.